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1 /**
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2 ******************************************************************************
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3 * @file stm32l4xx_hal_uart.h
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4 * @author MCD Application Team
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5 * @version V1.6.0
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6 * @date 28-October-2016
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7 * @brief Header file of UART HAL module.
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8 ******************************************************************************
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9 * @attention
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10 *
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11 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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12 *
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13 * Redistribution and use in source and binary forms, with or without modification,
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14 * are permitted provided that the following conditions are met:
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15 * 1. Redistributions of source code must retain the above copyright notice,
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16 * this list of conditions and the following disclaimer.
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17 * 2. Redistributions in binary form must reproduce the above copyright notice,
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18 * this list of conditions and the following disclaimer in the documentation
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19 * and/or other materials provided with the distribution.
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20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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21 * may be used to endorse or promote products derived from this software
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22 * without specific prior written permission.
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23 *
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24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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34 *
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35 ******************************************************************************
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36 */
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37
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38 /* Define to prevent recursive inclusion -------------------------------------*/
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39 #ifndef __STM32L4xx_HAL_UART_H
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40 #define __STM32L4xx_HAL_UART_H
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41
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42 #ifdef __cplusplus
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43 extern "C" {
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44 #endif
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45
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46 /* Includes ------------------------------------------------------------------*/
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47 #include "stm32l4xx_hal_def.h"
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48
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49 /** @addtogroup STM32L4xx_HAL_Driver
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50 * @{
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51 */
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52
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53 /** @addtogroup UART
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54 * @{
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55 */
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56
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57 /* Exported types ------------------------------------------------------------*/
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58 /** @defgroup UART_Exported_Types UART Exported Types
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59 * @{
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60 */
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61
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62 /**
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63 * @brief UART Init Structure definition
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64 */
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65 typedef struct
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66 {
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67 uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
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68 The baud rate register is computed using the following formula:
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69 - If oversampling is 16 or in LIN mode,
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70 Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate)))
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71 - If oversampling is 8,
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72 Baud Rate Register[15:4] = ((2 * PCLKx) / ((huart->Init.BaudRate)))[15:4]
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73 Baud Rate Register[3] = 0
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74 Baud Rate Register[2:0] = (((2 * PCLKx) / ((huart->Init.BaudRate)))[3:0]) >> 1 */
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75
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76 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
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77 This parameter can be a value of @ref UARTEx_Word_Length. */
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78
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79 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
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80 This parameter can be a value of @ref UART_Stop_Bits. */
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81
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82 uint32_t Parity; /*!< Specifies the parity mode.
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83 This parameter can be a value of @ref UART_Parity
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84 @note When parity is enabled, the computed parity is inserted
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85 at the MSB position of the transmitted data (9th bit when
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86 the word length is set to 9 data bits; 8th bit when the
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87 word length is set to 8 data bits). */
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88
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89 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
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90 This parameter can be a value of @ref UART_Mode. */
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91
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92 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled
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93 or disabled.
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94 This parameter can be a value of @ref UART_Hardware_Flow_Control. */
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95
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96 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8).
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97 This parameter can be a value of @ref UART_Over_Sampling. */
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98
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99 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected.
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100 Selecting the single sample method increases the receiver tolerance to clock
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101 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */
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102 }UART_InitTypeDef;
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103
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104 /**
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105 * @brief UART Advanced Features initalization structure definition
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106 */
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107 typedef struct
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108 {
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109 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several
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110 Advanced Features may be initialized at the same time .
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111 This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type. */
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112
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113 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted.
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114 This parameter can be a value of @ref UART_Tx_Inv. */
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115
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116 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted.
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117 This parameter can be a value of @ref UART_Rx_Inv. */
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118
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119 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic
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120 vs negative/inverted logic).
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121 This parameter can be a value of @ref UART_Data_Inv. */
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122
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123 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped.
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124 This parameter can be a value of @ref UART_Rx_Tx_Swap. */
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125
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126 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled.
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127 This parameter can be a value of @ref UART_Overrun_Disable. */
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128
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129 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error.
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130 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */
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131
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132 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled.
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133 This parameter can be a value of @ref UART_AutoBaudRate_Enable */
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134
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135 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate
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136 detection is carried out.
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137 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */
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138
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139 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line.
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140 This parameter can be a value of @ref UART_MSB_First. */
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141 } UART_AdvFeatureInitTypeDef;
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142
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143
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144
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145 /**
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146 * @brief HAL UART State structures definition
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147 * @note HAL UART State value is a combination of 2 different substates: gState and RxState.
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148 * - gState contains UART state information related to global Handle management
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149 * and also information related to Tx operations.
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150 * gState value coding follow below described bitmap :
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151 * b7-b6 Error information
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152 * 00 : No Error
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153 * 01 : (Not Used)
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154 * 10 : Timeout
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155 * 11 : Error
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156 * b5 IP initilisation status
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157 * 0 : Reset (IP not initialized)
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158 * 1 : Init done (IP not initialized. HAL UART Init function already called)
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159 * b4-b3 (not used)
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160 * xx : Should be set to 00
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161 * b2 Intrinsic process state
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162 * 0 : Ready
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163 * 1 : Busy (IP busy with some configuration or internal operations)
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164 * b1 (not used)
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165 * x : Should be set to 0
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166 * b0 Tx state
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167 * 0 : Ready (no Tx operation ongoing)
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168 * 1 : Busy (Tx operation ongoing)
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169 * - RxState contains information related to Rx operations.
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170 * RxState value coding follow below described bitmap :
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171 * b7-b6 (not used)
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172 * xx : Should be set to 00
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173 * b5 IP initilisation status
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174 * 0 : Reset (IP not initialized)
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175 * 1 : Init done (IP not initialized)
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176 * b4-b2 (not used)
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177 * xxx : Should be set to 000
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178 * b1 Rx state
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179 * 0 : Ready (no Rx operation ongoing)
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180 * 1 : Busy (Rx operation ongoing)
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181 * b0 (not used)
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182 * x : Should be set to 0.
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183 */
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184 typedef enum
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185 {
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186 HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized
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187 Value is allowed for gState and RxState */
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188 HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
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189 Value is allowed for gState and RxState */
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190 HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
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191 Value is allowed for gState only */
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192 HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
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193 Value is allowed for gState only */
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194 HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
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195 Value is allowed for RxState only */
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196 HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
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197 Not to be used for neither gState nor RxState.
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198 Value is result of combination (Or) between gState and RxState values */
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199 HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
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200 Value is allowed for gState only */
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201 HAL_UART_STATE_ERROR = 0xE0U /*!< Error
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202 Value is allowed for gState only */
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203 }HAL_UART_StateTypeDef;
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204
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205 /**
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206 * @brief HAL UART Error Code structure definition
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207 */
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208 typedef enum
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209 {
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210 HAL_UART_ERROR_NONE = 0x00, /*!< No error */
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211 HAL_UART_ERROR_PE = 0x01, /*!< Parity error */
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212 HAL_UART_ERROR_NE = 0x02, /*!< Noise error */
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213 HAL_UART_ERROR_FE = 0x04, /*!< frame error */
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214 HAL_UART_ERROR_ORE = 0x08, /*!< Overrun error */
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215 HAL_UART_ERROR_DMA = 0x10, /*!< DMA transfer error */
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216 HAL_UART_ERROR_BUSY = 0x20 /*!< Busy Error */
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217 }HAL_UART_ErrorTypeDef;
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218
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219 /**
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220 * @brief UART clock sources definition
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221 */
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222 typedef enum
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223 {
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224 UART_CLOCKSOURCE_PCLK1 = 0x00, /*!< PCLK1 clock source */
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225 UART_CLOCKSOURCE_PCLK2 = 0x01, /*!< PCLK2 clock source */
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226 UART_CLOCKSOURCE_HSI = 0x02, /*!< HSI clock source */
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227 UART_CLOCKSOURCE_SYSCLK = 0x04, /*!< SYSCLK clock source */
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228 UART_CLOCKSOURCE_LSE = 0x08, /*!< LSE clock source */
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229 UART_CLOCKSOURCE_UNDEFINED = 0x10 /*!< Undefined clock source */
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230 }UART_ClockSourceTypeDef;
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231
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232 /**
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233 * @brief UART handle Structure definition
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234 */
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235 typedef struct
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236 {
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237 USART_TypeDef *Instance; /*!< UART registers base address */
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238
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239 UART_InitTypeDef Init; /*!< UART communication parameters */
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240
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241 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */
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242
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243 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
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244
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245 uint16_t TxXferSize; /*!< UART Tx Transfer size */
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246
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247 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
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248
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249 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
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250
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251 uint16_t RxXferSize; /*!< UART Rx Transfer size */
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252
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253 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
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254
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255 uint16_t Mask; /*!< UART Rx RDR register mask */
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256
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257 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
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258
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259 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
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260
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261 HAL_LockTypeDef Lock; /*!< Locking object */
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262
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263 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
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264 and also related to Tx operations.
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265 This parameter can be a value of @ref HAL_UART_StateTypeDef */
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266
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267 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
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268 This parameter can be a value of @ref HAL_UART_StateTypeDef */
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269
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270 __IO uint32_t ErrorCode; /*!< UART Error code */
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271
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272 }UART_HandleTypeDef;
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273
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274 /**
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275 * @}
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276 */
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277
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278 /* Exported constants --------------------------------------------------------*/
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279 /** @defgroup UART_Exported_Constants UART Exported Constants
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280 * @{
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281 */
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282
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283 /** @defgroup UART_Stop_Bits UART Number of Stop Bits
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284 * @{
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285 */
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286 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */
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287 #define UART_STOPBITS_1 ((uint32_t)0x00000000) /*!< UART frame with 1 stop bit */
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288 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */
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289 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */
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290 /**
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291 * @}
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292 */
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293
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294 /** @defgroup UART_Parity UART Parity
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295 * @{
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296 */
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297 #define UART_PARITY_NONE ((uint32_t)0x00000000) /*!< No parity */
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298 #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) /*!< Even parity */
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299 #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) /*!< Odd parity */
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300 /**
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301 * @}
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302 */
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303
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304 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
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305 * @{
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306 */
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307 #define UART_HWCONTROL_NONE ((uint32_t)0x00000000) /*!< No hardware control */
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308 #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE) /*!< Request To Send */
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309 #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE) /*!< Clear To Send */
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310 #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE)) /*!< Request and Clear To Send */
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311 /**
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312 * @}
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313 */
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314
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315 /** @defgroup UART_Mode UART Transfer Mode
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316 * @{
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317 */
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318 #define UART_MODE_RX ((uint32_t)USART_CR1_RE) /*!< RX mode */
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319 #define UART_MODE_TX ((uint32_t)USART_CR1_TE) /*!< TX mode */
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320 #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) /*!< RX and TX mode */
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321 /**
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322 * @}
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323 */
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324
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325 /** @defgroup UART_State UART State
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326 * @{
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327 */
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328 #define UART_STATE_DISABLE ((uint32_t)0x00000000) /*!< UART disabled */
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329 #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE) /*!< UART enabled */
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330 /**
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331 * @}
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332 */
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333
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334 /** @defgroup UART_Over_Sampling UART Over Sampling
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335 * @{
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336 */
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337 #define UART_OVERSAMPLING_16 ((uint32_t)0x00000000) /*!< Oversampling by 16 */
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338 #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8) /*!< Oversampling by 8 */
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339 /**
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340 * @}
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341 */
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342
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343 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method
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344 * @{
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345 */
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346 #define UART_ONE_BIT_SAMPLE_DISABLE ((uint32_t)0x00000000) /*!< One-bit sampling disable */
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347 #define UART_ONE_BIT_SAMPLE_ENABLE ((uint32_t)USART_CR3_ONEBIT) /*!< One-bit sampling enable */
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348 /**
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349 * @}
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350 */
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351
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352 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode
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353 * @{
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354 */
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355 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT ((uint32_t)0x00000000) /*!< Auto Baud rate detection on start bit */
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356 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE ((uint32_t)USART_CR2_ABRMODE_0) /*!< Auto Baud rate detection on falling edge */
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357 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME ((uint32_t)USART_CR2_ABRMODE_1) /*!< Auto Baud rate detection on 0x7F frame detection */
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358 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME ((uint32_t)USART_CR2_ABRMODE) /*!< Auto Baud rate detection on 0x55 frame detection */
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359 /**
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360 * @}
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361 */
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362
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363 /** @defgroup UART_Receiver_TimeOut UART Receiver TimeOut
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364 * @{
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365 */
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366 #define UART_RECEIVER_TIMEOUT_DISABLE ((uint32_t)0x00000000) /*!< UART receiver timeout disable */
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367 #define UART_RECEIVER_TIMEOUT_ENABLE ((uint32_t)USART_CR2_RTOEN) /*!< UART receiver timeout enable */
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368 /**
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369 * @}
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370 */
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371
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372 /** @defgroup UART_LIN UART Local Interconnection Network mode
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373 * @{
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374 */
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375 #define UART_LIN_DISABLE ((uint32_t)0x00000000) /*!< Local Interconnect Network disable */
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376 #define UART_LIN_ENABLE ((uint32_t)USART_CR2_LINEN) /*!< Local Interconnect Network enable */
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377 /**
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378 * @}
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379 */
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380
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381 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection
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382 * @{
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383 */
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384 #define UART_LINBREAKDETECTLENGTH_10B ((uint32_t)0x00000000) /*!< LIN 10-bit break detection length */
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385 #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL) /*!< LIN 11-bit break detection length */
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386 /**
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387 * @}
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388 */
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389
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390 /** @defgroup UART_DMA_Tx UART DMA Tx
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391 * @{
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392 */
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393 #define UART_DMA_TX_DISABLE ((uint32_t)0x00000000) /*!< UART DMA TX disabled */
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394 #define UART_DMA_TX_ENABLE ((uint32_t)USART_CR3_DMAT) /*!< UART DMA TX enabled */
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395 /**
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396 * @}
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397 */
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398
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399 /** @defgroup UART_DMA_Rx UART DMA Rx
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400 * @{
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401 */
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402 #define UART_DMA_RX_DISABLE ((uint32_t)0x00000000) /*!< UART DMA RX disabled */
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403 #define UART_DMA_RX_ENABLE ((uint32_t)USART_CR3_DMAR) /*!< UART DMA RX enabled */
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404 /**
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405 * @}
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406 */
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407
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408 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection
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409 * @{
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410 */
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411 #define UART_HALF_DUPLEX_DISABLE ((uint32_t)0x00000000) /*!< UART half-duplex disabled */
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412 #define UART_HALF_DUPLEX_ENABLE ((uint32_t)USART_CR3_HDSEL) /*!< UART half-duplex enabled */
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413 /**
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414 * @}
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415 */
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416
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417 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods
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418 * @{
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419 */
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420 #define UART_WAKEUPMETHOD_IDLELINE ((uint32_t)0x00000000) /*!< UART wake-up on idle line */
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421 #define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE) /*!< UART wake-up on address mark */
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422 /**
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423 * @}
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424 */
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425
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426 /** @defgroup UART_Request_Parameters UART Request Parameters
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427 * @{
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428 */
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429 #define UART_AUTOBAUD_REQUEST ((uint32_t)USART_RQR_ABRRQ) /*!< Auto-Baud Rate Request */
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430 #define UART_SENDBREAK_REQUEST ((uint32_t)USART_RQR_SBKRQ) /*!< Send Break Request */
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431 #define UART_MUTE_MODE_REQUEST ((uint32_t)USART_RQR_MMRQ) /*!< Mute Mode Request */
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432 #define UART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */
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433 #define UART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */
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434 /**
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435 * @}
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436 */
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437
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438 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type
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439 * @{
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440 */
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441 #define UART_ADVFEATURE_NO_INIT ((uint32_t)0x00000000) /*!< No advanced feature initialization */
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442 #define UART_ADVFEATURE_TXINVERT_INIT ((uint32_t)0x00000001) /*!< TX pin active level inversion */
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443 #define UART_ADVFEATURE_RXINVERT_INIT ((uint32_t)0x00000002) /*!< RX pin active level inversion */
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444 #define UART_ADVFEATURE_DATAINVERT_INIT ((uint32_t)0x00000004) /*!< Binary data inversion */
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445 #define UART_ADVFEATURE_SWAP_INIT ((uint32_t)0x00000008) /*!< TX/RX pins swap */
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446 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT ((uint32_t)0x00000010) /*!< RX overrun disable */
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447 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT ((uint32_t)0x00000020) /*!< DMA disable on Reception Error */
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448 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT ((uint32_t)0x00000040) /*!< Auto Baud rate detection initialization */
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449 #define UART_ADVFEATURE_MSBFIRST_INIT ((uint32_t)0x00000080) /*!< Most significant bit sent/received first */
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450 /**
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451 * @}
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452 */
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453
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454 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion
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455 * @{
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456 */
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457 #define UART_ADVFEATURE_TXINV_DISABLE ((uint32_t)0x00000000) /*!< TX pin active level inversion disable */
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458 #define UART_ADVFEATURE_TXINV_ENABLE ((uint32_t)USART_CR2_TXINV) /*!< TX pin active level inversion enable */
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459 /**
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460 * @}
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461 */
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462
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463 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion
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464 * @{
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465 */
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466 #define UART_ADVFEATURE_RXINV_DISABLE ((uint32_t)0x00000000) /*!< RX pin active level inversion disable */
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467 #define UART_ADVFEATURE_RXINV_ENABLE ((uint32_t)USART_CR2_RXINV) /*!< RX pin active level inversion enable */
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468 /**
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469 * @}
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470 */
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471
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472 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion
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473 * @{
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474 */
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475 #define UART_ADVFEATURE_DATAINV_DISABLE ((uint32_t)0x00000000) /*!< Binary data inversion disable */
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476 #define UART_ADVFEATURE_DATAINV_ENABLE ((uint32_t)USART_CR2_DATAINV) /*!< Binary data inversion enable */
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477 /**
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478 * @}
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479 */
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480
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481 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap
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482 * @{
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483 */
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484 #define UART_ADVFEATURE_SWAP_DISABLE ((uint32_t)0x00000000) /*!< TX/RX pins swap disable */
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485 #define UART_ADVFEATURE_SWAP_ENABLE ((uint32_t)USART_CR2_SWAP) /*!< TX/RX pins swap enable */
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486 /**
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487 * @}
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488 */
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489
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490 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable
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491 * @{
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492 */
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493 #define UART_ADVFEATURE_OVERRUN_ENABLE ((uint32_t)0x00000000) /*!< RX overrun enable */
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494 #define UART_ADVFEATURE_OVERRUN_DISABLE ((uint32_t)USART_CR3_OVRDIS) /*!< RX overrun disable */
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495 /**
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|
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496 * @}
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497 */
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498
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499 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable
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500 * @{
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501 */
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502 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE ((uint32_t)0x00000000) /*!< RX Auto Baud rate detection enable */
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503 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE ((uint32_t)USART_CR2_ABREN) /*!< RX Auto Baud rate detection disable */
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504 /**
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505 * @}
|
|
|
506 */
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507
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508 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error
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509 * @{
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510 */
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511 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR ((uint32_t)0x00000000) /*!< DMA enable on Reception Error */
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|
512 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR ((uint32_t)USART_CR3_DDRE) /*!< DMA disable on Reception Error */
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513 /**
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|
514 * @}
|
|
|
515 */
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516
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517 /** @defgroup UART_MSB_First UART Advanced Feature MSB First
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518 * @{
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519 */
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520 #define UART_ADVFEATURE_MSBFIRST_DISABLE ((uint32_t)0x00000000) /*!< Most significant bit sent/received first disable */
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521 #define UART_ADVFEATURE_MSBFIRST_ENABLE ((uint32_t)USART_CR2_MSBFIRST) /*!< Most significant bit sent/received first enable */
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522 /**
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523 * @}
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|
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524 */
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525
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|
|
526 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable
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527 * @{
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528 */
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529 #define UART_ADVFEATURE_STOPMODE_DISABLE ((uint32_t)0x00000000) /*!< UART stop mode disable */
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530 #define UART_ADVFEATURE_STOPMODE_ENABLE ((uint32_t)USART_CR1_UESM) /*!< UART stop mode enable */
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|
|
531 /**
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|
|
532 * @}
|
|
|
533 */
|
|
|
534
|
|
|
535 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable
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|
536 * @{
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|
|
537 */
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|
538 #define UART_ADVFEATURE_MUTEMODE_DISABLE ((uint32_t)0x00000000) /*!< UART mute mode disable */
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|
539 #define UART_ADVFEATURE_MUTEMODE_ENABLE ((uint32_t)USART_CR1_MME) /*!< UART mute mode enable */
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|
|
540 /**
|
|
|
541 * @}
|
|
|
542 */
|
|
|
543
|
|
|
544 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register
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|
|
545 * @{
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|
|
546 */
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|
|
547 #define UART_CR2_ADDRESS_LSB_POS ((uint32_t) 24) /*!< UART address-matching LSB position in CR2 register */
|
|
|
548 /**
|
|
|
549 * @}
|
|
|
550 */
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|
551
|
|
|
552 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection
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|
553 * @{
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|
|
554 */
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|
|
555 #define UART_WAKEUP_ON_ADDRESS ((uint32_t)0x00000000) /*!< UART wake-up on address */
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|
|
556 #define UART_WAKEUP_ON_STARTBIT ((uint32_t)USART_CR3_WUS_1) /*!< UART wake-up on start bit */
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|
557 #define UART_WAKEUP_ON_READDATA_NONEMPTY ((uint32_t)USART_CR3_WUS) /*!< UART wake-up on receive data register not empty */
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|
|
558 /**
|
|
|
559 * @}
|
|
|
560 */
|
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|
561
|
|
|
562 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity
|
|
|
563 * @{
|
|
|
564 */
|
|
|
565 #define UART_DE_POLARITY_HIGH ((uint32_t)0x00000000) /*!< Driver enable signal is active high */
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|
|
566 #define UART_DE_POLARITY_LOW ((uint32_t)USART_CR3_DEP) /*!< Driver enable signal is active low */
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|
567 /**
|
|
|
568 * @}
|
|
|
569 */
|
|
|
570
|
|
|
571 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register
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|
|
572 * @{
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|
573 */
|
|
|
574 #define UART_CR1_DEAT_ADDRESS_LSB_POS ((uint32_t) 21) /*!< UART Driver Enable assertion time LSB position in CR1 register */
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|
575 /**
|
|
|
576 * @}
|
|
|
577 */
|
|
|
578
|
|
|
579 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register
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|
|
580 * @{
|
|
|
581 */
|
|
|
582 #define UART_CR1_DEDT_ADDRESS_LSB_POS ((uint32_t) 16) /*!< UART Driver Enable de-assertion time LSB position in CR1 register */
|
|
|
583 /**
|
|
|
584 * @}
|
|
|
585 */
|
|
|
586
|
|
|
587 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask
|
|
|
588 * @{
|
|
|
589 */
|
|
|
590 #define UART_IT_MASK ((uint32_t)0x001F) /*!< UART interruptions flags mask */
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|
|
591 /**
|
|
|
592 * @}
|
|
|
593 */
|
|
|
594
|
|
|
595 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value
|
|
|
596 * @{
|
|
|
597 */
|
|
|
598 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFF /*!< UART polling-based communications time-out value */
|
|
|
599 /**
|
|
|
600 * @}
|
|
|
601 */
|
|
|
602
|
|
|
603 /** @defgroup UART_Flags UART Status Flags
|
|
|
604 * Elements values convention: 0xXXXX
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|
|
605 * - 0xXXXX : Flag mask in the ISR register
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|
|
606 * @{
|
|
|
607 */
|
|
|
608 #define UART_FLAG_REACK ((uint32_t)0x00400000) /*!< UART receive enable acknowledge flag */
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|
|
609 #define UART_FLAG_TEACK ((uint32_t)0x00200000) /*!< UART transmit enable acknowledge flag */
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|
|
610 #define UART_FLAG_WUF ((uint32_t)0x00100000) /*!< UART wake-up from stop mode flag */
|
|
|
611 #define UART_FLAG_RWU ((uint32_t)0x00080000) /*!< UART receiver wake-up from mute mode flag */
|
|
|
612 #define UART_FLAG_SBKF ((uint32_t)0x00040000) /*!< UART send break flag */
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|
|
613 #define UART_FLAG_CMF ((uint32_t)0x00020000) /*!< UART character match flag */
|
|
|
614 #define UART_FLAG_BUSY ((uint32_t)0x00010000) /*!< UART busy flag */
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|
|
615 #define UART_FLAG_ABRF ((uint32_t)0x00008000) /*!< UART auto Baud rate flag */
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|
|
616 #define UART_FLAG_ABRE ((uint32_t)0x00004000) /*!< UART auto Baud rate error */
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|
|
617 #define UART_FLAG_EOBF ((uint32_t)0x00001000) /*!< UART end of block flag */
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|
|
618 #define UART_FLAG_RTOF ((uint32_t)0x00000800) /*!< UART receiver timeout flag */
|
|
|
619 #define UART_FLAG_CTS ((uint32_t)0x00000400) /*!< UART clear to send flag */
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|
|
620 #define UART_FLAG_CTSIF ((uint32_t)0x00000200) /*!< UART clear to send interrupt flag */
|
|
|
621 #define UART_FLAG_LBDF ((uint32_t)0x00000100) /*!< UART LIN break detection flag */
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|
|
622 #define UART_FLAG_TXE ((uint32_t)0x00000080) /*!< UART transmit data register empty */
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|
|
623 #define UART_FLAG_TC ((uint32_t)0x00000040) /*!< UART transmission complete */
|
|
|
624 #define UART_FLAG_RXNE ((uint32_t)0x00000020) /*!< UART read data register not empty */
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|
|
625 #define UART_FLAG_IDLE ((uint32_t)0x00000010) /*!< UART idle flag */
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|
|
626 #define UART_FLAG_ORE ((uint32_t)0x00000008) /*!< UART overrun error */
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|
|
627 #define UART_FLAG_NE ((uint32_t)0x00000004) /*!< UART noise error */
|
|
|
628 #define UART_FLAG_FE ((uint32_t)0x00000002) /*!< UART frame error */
|
|
|
629 #define UART_FLAG_PE ((uint32_t)0x00000001) /*!< UART parity error */
|
|
|
630 /**
|
|
|
631 * @}
|
|
|
632 */
|
|
|
633
|
|
|
634 /** @defgroup UART_Interrupt_definition UART Interrupts Definition
|
|
|
635 * Elements values convention: 000ZZZZZ0XXYYYYYb
|
|
|
636 * - YYYYY : Interrupt source position in the XX register (5bits)
|
|
|
637 * - XX : Interrupt source register (2bits)
|
|
|
638 * - 01: CR1 register
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|
|
639 * - 10: CR2 register
|
|
|
640 * - 11: CR3 register
|
|
|
641 * - ZZZZZ : Flag position in the ISR register(5bits)
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|
|
642 * @{
|
|
|
643 */
|
|
|
644 #define UART_IT_PE ((uint32_t)0x0028) /*!< UART parity error interruption */
|
|
|
645 #define UART_IT_TXE ((uint32_t)0x0727) /*!< UART transmit data register empty interruption */
|
|
|
646 #define UART_IT_TC ((uint32_t)0x0626) /*!< UART transmission complete interruption */
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|
|
647 #define UART_IT_RXNE ((uint32_t)0x0525) /*!< UART read data register not empty interruption */
|
|
|
648 #define UART_IT_IDLE ((uint32_t)0x0424) /*!< UART idle interruption */
|
|
|
649 #define UART_IT_LBD ((uint32_t)0x0846) /*!< UART LIN break detection interruption */
|
|
|
650 #define UART_IT_CTS ((uint32_t)0x096A) /*!< UART CTS interruption */
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|
|
651 #define UART_IT_CM ((uint32_t)0x112E) /*!< UART character match interruption */
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|
|
652 #define UART_IT_WUF ((uint32_t)0x1476) /*!< UART wake-up from stop mode interruption */
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|
|
653 #define UART_IT_ERR ((uint32_t)0x0060) /*!< UART error interruption */
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|
|
654 #define UART_IT_ORE ((uint32_t)0x0300) /*!< UART overrun error interruption */
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|
|
655 #define UART_IT_NE ((uint32_t)0x0200) /*!< UART noise error interruption */
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|
|
656 #define UART_IT_FE ((uint32_t)0x0100) /*!< UART frame error interruption */
|
|
|
657 /**
|
|
|
658 * @}
|
|
|
659 */
|
|
|
660
|
|
|
661 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags
|
|
|
662 * @{
|
|
|
663 */
|
|
|
664 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
|
|
|
665 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
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|
|
666 #define UART_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */
|
|
|
667 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */
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|
|
668 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
|
|
|
669 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
|
|
|
670 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */
|
|
|
671 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */
|
|
|
672 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< Receiver Time Out Clear Flag */
|
|
|
673 #define UART_CLEAR_EOBF USART_ICR_EOBCF /*!< End Of Block Clear Flag */
|
|
|
674 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */
|
|
|
675 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */
|
|
|
676 /**
|
|
|
677 * @}
|
|
|
678 */
|
|
|
679
|
|
|
680
|
|
|
681 /**
|
|
|
682 * @}
|
|
|
683 */
|
|
|
684
|
|
|
685 /* Exported macros -----------------------------------------------------------*/
|
|
|
686 /** @defgroup UART_Exported_Macros UART Exported Macros
|
|
|
687 * @{
|
|
|
688 */
|
|
|
689
|
|
|
690 /** @brief Reset UART handle states.
|
|
|
691 * @param __HANDLE__: UART handle.
|
|
|
692 * @retval None
|
|
|
693 */
|
|
|
694 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
|
|
695 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
|
|
|
696 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
|
|
|
697 } while(0)
|
|
|
698 /** @brief Flush the UART Data registers.
|
|
|
699 * @param __HANDLE__: specifies the UART Handle.
|
|
|
700 * @retval None
|
|
|
701 */
|
|
|
702 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
|
|
|
703 do{ \
|
|
|
704 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
|
|
|
705 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \
|
|
|
706 } while(0)
|
|
|
707
|
|
|
708 /** @brief Clear the specified UART pending flag.
|
|
|
709 * @param __HANDLE__: specifies the UART Handle.
|
|
|
710 * @param __FLAG__: specifies the flag to check.
|
|
|
711 * This parameter can be any combination of the following values:
|
|
|
712 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
|
|
|
713 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
|
|
|
714 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
|
|
|
715 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
|
|
|
716 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
|
|
|
717 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
|
|
|
718 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag
|
|
|
719 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
|
|
|
720 * @arg @ref UART_CLEAR_RTOF Receiver Time Out Clear Flag
|
|
|
721 * @arg @ref UART_CLEAR_EOBF End Of Block Clear Flag
|
|
|
722 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag
|
|
|
723 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag
|
|
|
724 * @retval None
|
|
|
725 */
|
|
|
726 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
|
|
|
727
|
|
|
728 /** @brief Clear the UART PE pending flag.
|
|
|
729 * @param __HANDLE__: specifies the UART Handle.
|
|
|
730 * @retval None
|
|
|
731 */
|
|
|
732 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF)
|
|
|
733
|
|
|
734 /** @brief Clear the UART FE pending flag.
|
|
|
735 * @param __HANDLE__: specifies the UART Handle.
|
|
|
736 * @retval None
|
|
|
737 */
|
|
|
738 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF)
|
|
|
739
|
|
|
740 /** @brief Clear the UART NE pending flag.
|
|
|
741 * @param __HANDLE__: specifies the UART Handle.
|
|
|
742 * @retval None
|
|
|
743 */
|
|
|
744 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF)
|
|
|
745
|
|
|
746 /** @brief Clear the UART ORE pending flag.
|
|
|
747 * @param __HANDLE__: specifies the UART Handle.
|
|
|
748 * @retval None
|
|
|
749 */
|
|
|
750 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF)
|
|
|
751
|
|
|
752 /** @brief Clear the UART IDLE pending flag.
|
|
|
753 * @param __HANDLE__: specifies the UART Handle.
|
|
|
754 * @retval None
|
|
|
755 */
|
|
|
756 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF)
|
|
|
757
|
|
|
758 /** @brief Check whether the specified UART flag is set or not.
|
|
|
759 * @param __HANDLE__: specifies the UART Handle.
|
|
|
760 * @param __FLAG__: specifies the flag to check.
|
|
|
761 * This parameter can be one of the following values:
|
|
|
762 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag
|
|
|
763 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag
|
|
|
764 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag
|
|
|
765 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode)
|
|
|
766 * @arg @ref UART_FLAG_SBKF Send Break flag
|
|
|
767 * @arg @ref UART_FLAG_CMF Character match flag
|
|
|
768 * @arg @ref UART_FLAG_BUSY Busy flag
|
|
|
769 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag
|
|
|
770 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag
|
|
|
771 * @arg @ref UART_FLAG_EOBF End of block flag
|
|
|
772 * @arg @ref UART_FLAG_RTOF Receiver timeout flag
|
|
|
773 * @arg @ref UART_FLAG_CTS CTS Change flag
|
|
|
774 * @arg @ref UART_FLAG_LBDF LIN Break detection flag
|
|
|
775 * @arg @ref UART_FLAG_TXE Transmit data register empty flag
|
|
|
776 * @arg @ref UART_FLAG_TC Transmission Complete flag
|
|
|
777 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag
|
|
|
778 * @arg @ref UART_FLAG_IDLE Idle Line detection flag
|
|
|
779 * @arg @ref UART_FLAG_ORE Overrun Error flag
|
|
|
780 * @arg @ref UART_FLAG_NE Noise Error flag
|
|
|
781 * @arg @ref UART_FLAG_FE Framing Error flag
|
|
|
782 * @arg @ref UART_FLAG_PE Parity Error flag
|
|
|
783 * @retval The new state of __FLAG__ (TRUE or FALSE).
|
|
|
784 */
|
|
|
785 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
|
|
|
786
|
|
|
787 /** @brief Enable the specified UART interrupt.
|
|
|
788 * @param __HANDLE__: specifies the UART Handle.
|
|
|
789 * @param __INTERRUPT__: specifies the UART interrupt source to enable.
|
|
|
790 * This parameter can be one of the following values:
|
|
|
791 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
|
|
|
792 * @arg @ref UART_IT_CM Character match interrupt
|
|
|
793 * @arg @ref UART_IT_CTS CTS change interrupt
|
|
|
794 * @arg @ref UART_IT_LBD LIN Break detection interrupt
|
|
|
795 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
|
|
|
796 * @arg @ref UART_IT_TC Transmission complete interrupt
|
|
|
797 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
|
|
|
798 * @arg @ref UART_IT_IDLE Idle line detection interrupt
|
|
|
799 * @arg @ref UART_IT_PE Parity Error interrupt
|
|
|
800 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
|
|
|
801 * @retval None
|
|
|
802 */
|
|
|
803 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
|
|
|
804 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
|
|
|
805 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))))
|
|
|
806
|
|
|
807
|
|
|
808 /** @brief Disable the specified UART interrupt.
|
|
|
809 * @param __HANDLE__: specifies the UART Handle.
|
|
|
810 * @param __INTERRUPT__: specifies the UART interrupt source to disable.
|
|
|
811 * This parameter can be one of the following values:
|
|
|
812 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
|
|
|
813 * @arg @ref UART_IT_CM Character match interrupt
|
|
|
814 * @arg @ref UART_IT_CTS CTS change interrupt
|
|
|
815 * @arg @ref UART_IT_LBD LIN Break detection interrupt
|
|
|
816 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
|
|
|
817 * @arg @ref UART_IT_TC Transmission complete interrupt
|
|
|
818 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
|
|
|
819 * @arg @ref UART_IT_IDLE Idle line detection interrupt
|
|
|
820 * @arg @ref UART_IT_PE Parity Error interrupt
|
|
|
821 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
|
|
|
822 * @retval None
|
|
|
823 */
|
|
|
824 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
|
|
|
825 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
|
|
|
826 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))))
|
|
|
827
|
|
|
828 /** @brief Check whether the specified UART interrupt has occurred or not.
|
|
|
829 * @param __HANDLE__: specifies the UART Handle.
|
|
|
830 * @param __IT__: specifies the UART interrupt to check.
|
|
|
831 * This parameter can be one of the following values:
|
|
|
832 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
|
|
|
833 * @arg @ref UART_IT_CM Character match interrupt
|
|
|
834 * @arg @ref UART_IT_CTS CTS change interrupt
|
|
|
835 * @arg @ref UART_IT_LBD LIN Break detection interrupt
|
|
|
836 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
|
|
|
837 * @arg @ref UART_IT_TC Transmission complete interrupt
|
|
|
838 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
|
|
|
839 * @arg @ref UART_IT_IDLE Idle line detection interrupt
|
|
|
840 * @arg @ref UART_IT_ORE Overrun Error interrupt
|
|
|
841 * @arg @ref UART_IT_NE Noise Error interrupt
|
|
|
842 * @arg @ref UART_IT_FE Framing Error interrupt
|
|
|
843 * @arg @ref UART_IT_PE Parity Error interrupt
|
|
|
844 * @retval The new state of __IT__ (TRUE or FALSE).
|
|
|
845 */
|
|
|
846 #define __HAL_UART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1 << ((__IT__)>> 0x08)))
|
|
|
847
|
|
|
848 /** @brief Check whether the specified UART interrupt source is enabled or not.
|
|
|
849 * @param __HANDLE__: specifies the UART Handle.
|
|
|
850 * @param __IT__: specifies the UART interrupt source to check.
|
|
|
851 * This parameter can be one of the following values:
|
|
|
852 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
|
|
|
853 * @arg @ref UART_IT_CM Character match interrupt
|
|
|
854 * @arg @ref UART_IT_CTS CTS change interrupt
|
|
|
855 * @arg @ref UART_IT_LBD LIN Break detection interrupt
|
|
|
856 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
|
|
|
857 * @arg @ref UART_IT_TC Transmission complete interrupt
|
|
|
858 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
|
|
|
859 * @arg @ref UART_IT_IDLE Idle line detection interrupt
|
|
|
860 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
|
|
|
861 * @arg @ref UART_IT_PE Parity Error interrupt
|
|
|
862 * @retval The new state of __IT__ (TRUE or FALSE).
|
|
|
863 */
|
|
|
864 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5U) == 2)? \
|
|
|
865 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1 << (((uint16_t)(__IT__)) & UART_IT_MASK)))
|
|
|
866
|
|
|
867 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag.
|
|
|
868 * @param __HANDLE__: specifies the UART Handle.
|
|
|
869 * @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set
|
|
|
870 * to clear the corresponding interrupt
|
|
|
871 * This parameter can be one of the following values:
|
|
|
872 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
|
|
|
873 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
|
|
|
874 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
|
|
|
875 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
|
|
|
876 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
|
|
|
877 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
|
|
|
878 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag
|
|
|
879 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
|
|
|
880 * @arg @ref UART_CLEAR_RTOF Receiver Time Out Clear Flag
|
|
|
881 * @arg @ref UART_CLEAR_EOBF End Of Block Clear Flag
|
|
|
882 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag
|
|
|
883 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag
|
|
|
884 * @retval None
|
|
|
885 */
|
|
|
886 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
|
|
|
887
|
|
|
888 /** @brief Set a specific UART request flag.
|
|
|
889 * @param __HANDLE__: specifies the UART Handle.
|
|
|
890 * @param __REQ__: specifies the request flag to set
|
|
|
891 * This parameter can be one of the following values:
|
|
|
892 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request
|
|
|
893 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request
|
|
|
894 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request
|
|
|
895 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request
|
|
|
896 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request
|
|
|
897 * @retval None
|
|
|
898 */
|
|
|
899 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint32_t)(__REQ__))
|
|
|
900
|
|
|
901 /** @brief Enable the UART one bit sample method.
|
|
|
902 * @param __HANDLE__: specifies the UART Handle.
|
|
|
903 * @retval None
|
|
|
904 */
|
|
|
905 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
|
|
|
906
|
|
|
907 /** @brief Disable the UART one bit sample method.
|
|
|
908 * @param __HANDLE__: specifies the UART Handle.
|
|
|
909 * @retval None
|
|
|
910 */
|
|
|
911 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT))
|
|
|
912
|
|
|
913 /** @brief Enable UART.
|
|
|
914 * @param __HANDLE__: specifies the UART Handle.
|
|
|
915 * @retval None
|
|
|
916 */
|
|
|
917 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
|
|
|
918
|
|
|
919 /** @brief Disable UART.
|
|
|
920 * @param __HANDLE__: specifies the UART Handle.
|
|
|
921 * @retval None
|
|
|
922 */
|
|
|
923 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
|
|
|
924
|
|
|
925 /** @brief Enable CTS flow control.
|
|
|
926 * @note This macro allows to enable CTS hardware flow control for a given UART instance,
|
|
|
927 * without need to call HAL_UART_Init() function.
|
|
|
928 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
|
|
|
929 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
|
|
|
930 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
|
|
|
931 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
|
|
|
932 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
|
|
|
933 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
|
|
|
934 * @param __HANDLE__: specifies the UART Handle.
|
|
|
935 * @retval None
|
|
|
936 */
|
|
|
937 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
|
|
|
938 do{ \
|
|
|
939 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
|
|
|
940 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
|
|
|
941 } while(0)
|
|
|
942
|
|
|
943 /** @brief Disable CTS flow control.
|
|
|
944 * @note This macro allows to disable CTS hardware flow control for a given UART instance,
|
|
|
945 * without need to call HAL_UART_Init() function.
|
|
|
946 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
|
|
|
947 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
|
|
|
948 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
|
|
|
949 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
|
|
|
950 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
|
|
|
951 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
|
|
|
952 * @param __HANDLE__: specifies the UART Handle.
|
|
|
953 * @retval None
|
|
|
954 */
|
|
|
955 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
|
|
|
956 do{ \
|
|
|
957 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
|
|
|
958 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
|
|
|
959 } while(0)
|
|
|
960
|
|
|
961 /** @brief Enable RTS flow control.
|
|
|
962 * @note This macro allows to enable RTS hardware flow control for a given UART instance,
|
|
|
963 * without need to call HAL_UART_Init() function.
|
|
|
964 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
|
|
|
965 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
|
|
|
966 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
|
|
|
967 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
|
|
|
968 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
|
|
|
969 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
|
|
|
970 * @param __HANDLE__: specifies the UART Handle.
|
|
|
971 * @retval None
|
|
|
972 */
|
|
|
973 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
|
|
|
974 do{ \
|
|
|
975 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
|
|
|
976 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
|
|
|
977 } while(0)
|
|
|
978
|
|
|
979 /** @brief Disable RTS flow control.
|
|
|
980 * @note This macro allows to disable RTS hardware flow control for a given UART instance,
|
|
|
981 * without need to call HAL_UART_Init() function.
|
|
|
982 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
|
|
|
983 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
|
|
|
984 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
|
|
|
985 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
|
|
|
986 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
|
|
|
987 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
|
|
|
988 * @param __HANDLE__: specifies the UART Handle.
|
|
|
989 * @retval None
|
|
|
990 */
|
|
|
991 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
|
|
|
992 do{ \
|
|
|
993 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
|
|
|
994 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
|
|
|
995 } while(0)
|
|
|
996
|
|
|
997 /**
|
|
|
998 * @}
|
|
|
999 */
|
|
|
1000
|
|
|
1001 /* Private macros --------------------------------------------------------*/
|
|
|
1002 /** @defgroup UART_Private_Macros UART Private Macros
|
|
|
1003 * @{
|
|
|
1004 */
|
|
|
1005 /** @brief BRR division operation to set BRR register with LPUART.
|
|
|
1006 * @param __PCLK__: LPUART clock.
|
|
|
1007 * @param __BAUD__: Baud rate set by the user.
|
|
|
1008 * @retval Division result
|
|
|
1009 */
|
|
|
1010 #define UART_DIV_LPUART(__PCLK__, __BAUD__) ((((uint64_t)(__PCLK__)*256) + ((__BAUD__)/2)) / (__BAUD__))
|
|
|
1011
|
|
|
1012 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode.
|
|
|
1013 * @param __PCLK__: UART clock.
|
|
|
1014 * @param __BAUD__: Baud rate set by the user.
|
|
|
1015 * @retval Division result
|
|
|
1016 */
|
|
|
1017 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2) + ((__BAUD__)/2)) / (__BAUD__))
|
|
|
1018
|
|
|
1019 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode.
|
|
|
1020 * @param __PCLK__: UART clock.
|
|
|
1021 * @param __BAUD__: Baud rate set by the user.
|
|
|
1022 * @retval Division result
|
|
|
1023 */
|
|
|
1024 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__) (((__PCLK__) + ((__BAUD__)/2)) / (__BAUD__))
|
|
|
1025
|
|
|
1026 /** @brief Check whether or not UART instance is Low Power UART.
|
|
|
1027 * @param __HANDLE__: specifies the UART Handle.
|
|
|
1028 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART)
|
|
|
1029 */
|
|
|
1030 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (((__HANDLE__)->Instance == LPUART1) ? SET : RESET )
|
|
|
1031
|
|
|
1032 /** @brief Check UART Baud rate.
|
|
|
1033 * @param __BAUDRATE__: Baudrate specified by the user.
|
|
|
1034 * The maximum Baud Rate is derived from the maximum clock on L4 (i.e. 80 MHz)
|
|
|
1035 * divided by the smallest oversampling used on the USART (i.e. 8)
|
|
|
1036 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid)
|
|
|
1037 */
|
|
|
1038 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 10000001)
|
|
|
1039
|
|
|
1040 /** @brief Check UART assertion time.
|
|
|
1041 * @param __TIME__: 5-bit value assertion time.
|
|
|
1042 * @retval Test result (TRUE or FALSE).
|
|
|
1043 */
|
|
|
1044 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1F)
|
|
|
1045
|
|
|
1046 /** @brief Check UART deassertion time.
|
|
|
1047 * @param __TIME__: 5-bit value deassertion time.
|
|
|
1048 * @retval Test result (TRUE or FALSE).
|
|
|
1049 */
|
|
|
1050 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1F)
|
|
|
1051
|
|
|
1052 /**
|
|
|
1053 * @brief Ensure that UART frame number of stop bits is valid.
|
|
|
1054 * @param __STOPBITS__: UART frame number of stop bits.
|
|
|
1055 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
|
|
|
1056 */
|
|
|
1057 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \
|
|
|
1058 ((__STOPBITS__) == UART_STOPBITS_1) || \
|
|
|
1059 ((__STOPBITS__) == UART_STOPBITS_1_5) || \
|
|
|
1060 ((__STOPBITS__) == UART_STOPBITS_2))
|
|
|
1061
|
|
|
1062 /**
|
|
|
1063 * @brief Ensure that LPUART frame number of stop bits is valid.
|
|
|
1064 * @param __STOPBITS__: LPUART frame number of stop bits.
|
|
|
1065 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
|
|
|
1066 */
|
|
|
1067 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \
|
|
|
1068 ((__STOPBITS__) == UART_STOPBITS_2))
|
|
|
1069
|
|
|
1070 /**
|
|
|
1071 * @brief Ensure that UART frame parity is valid.
|
|
|
1072 * @param __PARITY__: UART frame parity.
|
|
|
1073 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
|
|
|
1074 */
|
|
|
1075 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \
|
|
|
1076 ((__PARITY__) == UART_PARITY_EVEN) || \
|
|
|
1077 ((__PARITY__) == UART_PARITY_ODD))
|
|
|
1078
|
|
|
1079 /**
|
|
|
1080 * @brief Ensure that UART hardware flow control is valid.
|
|
|
1081 * @param __CONTROL__: UART hardware flow control.
|
|
|
1082 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid)
|
|
|
1083 */
|
|
|
1084 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\
|
|
|
1085 (((__CONTROL__) == UART_HWCONTROL_NONE) || \
|
|
|
1086 ((__CONTROL__) == UART_HWCONTROL_RTS) || \
|
|
|
1087 ((__CONTROL__) == UART_HWCONTROL_CTS) || \
|
|
|
1088 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS))
|
|
|
1089
|
|
|
1090 /**
|
|
|
1091 * @brief Ensure that UART communication mode is valid.
|
|
|
1092 * @param __MODE__: UART communication mode.
|
|
|
1093 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
|
|
|
1094 */
|
|
|
1095 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == (uint32_t)0x00) && ((__MODE__) != (uint32_t)0x00))
|
|
|
1096
|
|
|
1097 /**
|
|
|
1098 * @brief Ensure that UART state is valid.
|
|
|
1099 * @param __STATE__: UART state.
|
|
|
1100 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid)
|
|
|
1101 */
|
|
|
1102 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \
|
|
|
1103 ((__STATE__) == UART_STATE_ENABLE))
|
|
|
1104
|
|
|
1105 /**
|
|
|
1106 * @brief Ensure that UART oversampling is valid.
|
|
|
1107 * @param __SAMPLING__: UART oversampling.
|
|
|
1108 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid)
|
|
|
1109 */
|
|
|
1110 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \
|
|
|
1111 ((__SAMPLING__) == UART_OVERSAMPLING_8))
|
|
|
1112
|
|
|
1113 /**
|
|
|
1114 * @brief Ensure that UART frame sampling is valid.
|
|
|
1115 * @param __ONEBIT__: UART frame sampling.
|
|
|
1116 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid)
|
|
|
1117 */
|
|
|
1118 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \
|
|
|
1119 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE))
|
|
|
1120
|
|
|
1121 /**
|
|
|
1122 * @brief Ensure that UART auto Baud rate detection mode is valid.
|
|
|
1123 * @param __MODE__: UART auto Baud rate detection mode.
|
|
|
1124 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
|
|
|
1125 */
|
|
|
1126 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \
|
|
|
1127 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \
|
|
|
1128 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \
|
|
|
1129 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME))
|
|
|
1130
|
|
|
1131 /**
|
|
|
1132 * @brief Ensure that UART receiver timeout setting is valid.
|
|
|
1133 * @param __TIMEOUT__: UART receiver timeout setting.
|
|
|
1134 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid)
|
|
|
1135 */
|
|
|
1136 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \
|
|
|
1137 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE))
|
|
|
1138
|
|
|
1139 /**
|
|
|
1140 * @brief Ensure that UART LIN state is valid.
|
|
|
1141 * @param __LIN__: UART LIN state.
|
|
|
1142 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid)
|
|
|
1143 */
|
|
|
1144 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \
|
|
|
1145 ((__LIN__) == UART_LIN_ENABLE))
|
|
|
1146
|
|
|
1147 /**
|
|
|
1148 * @brief Ensure that UART LIN break detection length is valid.
|
|
|
1149 * @param __LENGTH__: UART LIN break detection length.
|
|
|
1150 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
|
|
|
1151 */
|
|
|
1152 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \
|
|
|
1153 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B))
|
|
|
1154
|
|
|
1155 /**
|
|
|
1156 * @brief Ensure that UART DMA TX state is valid.
|
|
|
1157 * @param __DMATX__: UART DMA TX state.
|
|
|
1158 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid)
|
|
|
1159 */
|
|
|
1160 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \
|
|
|
1161 ((__DMATX__) == UART_DMA_TX_ENABLE))
|
|
|
1162
|
|
|
1163 /**
|
|
|
1164 * @brief Ensure that UART DMA RX state is valid.
|
|
|
1165 * @param __DMARX__: UART DMA RX state.
|
|
|
1166 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid)
|
|
|
1167 */
|
|
|
1168 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \
|
|
|
1169 ((__DMARX__) == UART_DMA_RX_ENABLE))
|
|
|
1170
|
|
|
1171 /**
|
|
|
1172 * @brief Ensure that UART half-duplex state is valid.
|
|
|
1173 * @param __HDSEL__: UART half-duplex state.
|
|
|
1174 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid)
|
|
|
1175 */
|
|
|
1176 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \
|
|
|
1177 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE))
|
|
|
1178
|
|
|
1179 /**
|
|
|
1180 * @brief Ensure that UART wake-up method is valid.
|
|
|
1181 * @param __WAKEUP__: UART wake-up method .
|
|
|
1182 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid)
|
|
|
1183 */
|
|
|
1184 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \
|
|
|
1185 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK))
|
|
|
1186
|
|
|
1187 /**
|
|
|
1188 * @brief Ensure that UART request parameter is valid.
|
|
|
1189 * @param __PARAM__: UART request parameter.
|
|
|
1190 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
|
|
|
1191 */
|
|
|
1192 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \
|
|
|
1193 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \
|
|
|
1194 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \
|
|
|
1195 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \
|
|
|
1196 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST))
|
|
|
1197
|
|
|
1198 /**
|
|
|
1199 * @brief Ensure that UART advanced features initialization is valid.
|
|
|
1200 * @param __INIT__: UART advanced features initialization.
|
|
|
1201 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid)
|
|
|
1202 */
|
|
|
1203 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \
|
|
|
1204 UART_ADVFEATURE_TXINVERT_INIT | \
|
|
|
1205 UART_ADVFEATURE_RXINVERT_INIT | \
|
|
|
1206 UART_ADVFEATURE_DATAINVERT_INIT | \
|
|
|
1207 UART_ADVFEATURE_SWAP_INIT | \
|
|
|
1208 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \
|
|
|
1209 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \
|
|
|
1210 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \
|
|
|
1211 UART_ADVFEATURE_MSBFIRST_INIT))
|
|
|
1212
|
|
|
1213 /**
|
|
|
1214 * @brief Ensure that UART frame TX inversion setting is valid.
|
|
|
1215 * @param __TXINV__: UART frame TX inversion setting.
|
|
|
1216 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid)
|
|
|
1217 */
|
|
|
1218 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \
|
|
|
1219 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE))
|
|
|
1220
|
|
|
1221 /**
|
|
|
1222 * @brief Ensure that UART frame RX inversion setting is valid.
|
|
|
1223 * @param __RXINV__: UART frame RX inversion setting.
|
|
|
1224 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid)
|
|
|
1225 */
|
|
|
1226 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \
|
|
|
1227 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE))
|
|
|
1228
|
|
|
1229 /**
|
|
|
1230 * @brief Ensure that UART frame data inversion setting is valid.
|
|
|
1231 * @param __DATAINV__: UART frame data inversion setting.
|
|
|
1232 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid)
|
|
|
1233 */
|
|
|
1234 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \
|
|
|
1235 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE))
|
|
|
1236
|
|
|
1237 /**
|
|
|
1238 * @brief Ensure that UART frame RX/TX pins swap setting is valid.
|
|
|
1239 * @param __SWAP__: UART frame RX/TX pins swap setting.
|
|
|
1240 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid)
|
|
|
1241 */
|
|
|
1242 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \
|
|
|
1243 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE))
|
|
|
1244
|
|
|
1245 /**
|
|
|
1246 * @brief Ensure that UART frame overrun setting is valid.
|
|
|
1247 * @param __OVERRUN__: UART frame overrun setting.
|
|
|
1248 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid)
|
|
|
1249 */
|
|
|
1250 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \
|
|
|
1251 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE))
|
|
|
1252
|
|
|
1253 /**
|
|
|
1254 * @brief Ensure that UART auto Baud rate state is valid.
|
|
|
1255 * @param __AUTOBAUDRATE__: UART auto Baud rate state.
|
|
|
1256 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid)
|
|
|
1257 */
|
|
|
1258 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \
|
|
|
1259 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE))
|
|
|
1260
|
|
|
1261 /**
|
|
|
1262 * @brief Ensure that UART DMA enabling or disabling on error setting is valid.
|
|
|
1263 * @param __DMA__: UART DMA enabling or disabling on error setting.
|
|
|
1264 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid)
|
|
|
1265 */
|
|
|
1266 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \
|
|
|
1267 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR))
|
|
|
1268
|
|
|
1269 /**
|
|
|
1270 * @brief Ensure that UART frame MSB first setting is valid.
|
|
|
1271 * @param __MSBFIRST__: UART frame MSB first setting.
|
|
|
1272 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid)
|
|
|
1273 */
|
|
|
1274 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \
|
|
|
1275 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE))
|
|
|
1276
|
|
|
1277 /**
|
|
|
1278 * @brief Ensure that UART stop mode state is valid.
|
|
|
1279 * @param __STOPMODE__: UART stop mode state.
|
|
|
1280 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid)
|
|
|
1281 */
|
|
|
1282 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \
|
|
|
1283 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE))
|
|
|
1284
|
|
|
1285 /**
|
|
|
1286 * @brief Ensure that UART mute mode state is valid.
|
|
|
1287 * @param __MUTE__: UART mute mode state.
|
|
|
1288 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid)
|
|
|
1289 */
|
|
|
1290 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \
|
|
|
1291 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE))
|
|
|
1292
|
|
|
1293 /**
|
|
|
1294 * @brief Ensure that UART wake-up selection is valid.
|
|
|
1295 * @param __WAKE__: UART wake-up selection.
|
|
|
1296 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid)
|
|
|
1297 */
|
|
|
1298 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \
|
|
|
1299 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \
|
|
|
1300 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY))
|
|
|
1301
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1302 /**
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1303 * @brief Ensure that UART driver enable polarity is valid.
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1304 * @param __POLARITY__: UART driver enable polarity.
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1305 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid)
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1306 */
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1307 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \
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1308 ((__POLARITY__) == UART_DE_POLARITY_LOW))
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1309
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1310 /**
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1311 * @}
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1312 */
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1313
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1314 /* Include UART HAL Extended module */
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1315 #include "stm32l4xx_hal_uart_ex.h"
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1316
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1317 /* Exported functions --------------------------------------------------------*/
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1318 /** @addtogroup UART_Exported_Functions UART Exported Functions
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1319 * @{
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1320 */
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1321
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1322 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
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1323 * @{
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1324 */
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1325
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1326 /* Initialization and de-initialization functions ****************************/
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1327 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
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1328 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
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1329 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
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1330 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
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1331 HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
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1332 void HAL_UART_MspInit(UART_HandleTypeDef *huart);
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1333 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
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1334
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1335 /**
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1336 * @}
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1337 */
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1338
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1339 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions
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1340 * @{
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1341 */
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1342
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1343 /* IO operation functions *****************************************************/
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1344 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
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1345 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
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1346 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
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1347 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
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1348 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
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1349 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
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1350 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
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1351 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
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1352 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
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1353 /* Transfer Abort functions */
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1354 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
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1355 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
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1356 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart);
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1357 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart);
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1358 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart);
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1359 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart);
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1360
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1361 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
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1362 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
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1363 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
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1364 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
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1365 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
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1366 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
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1367 void HAL_UART_AbortCpltCallback (UART_HandleTypeDef *huart);
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1368 void HAL_UART_AbortTransmitCpltCallback (UART_HandleTypeDef *huart);
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1369 void HAL_UART_AbortReceiveCpltCallback (UART_HandleTypeDef *huart);
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1370
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1371 /**
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1372 * @}
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1373 */
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1374
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1375 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions
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1376 * @{
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1377 */
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1378
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1379 /* Peripheral Control functions ************************************************/
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1380 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
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1381 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart);
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1382 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart);
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1383 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
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1384 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
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1385 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
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1386
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1387 /**
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1388 * @}
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1389 */
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1390
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1391 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions
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1392 * @{
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1393 */
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1394
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1395 /* Peripheral State and Errors functions **************************************************/
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1396 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
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1397 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
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1398
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1399 /**
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1400 * @}
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1401 */
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1402
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1403 /**
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1404 * @}
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1405 */
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1406
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1407 /* Private functions -----------------------------------------------------------*/
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1408 /** @addtogroup UART_Private_Functions UART Private Functions
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1409 * @{
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1410 */
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1411
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1412 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart);
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1413 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart);
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1414 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
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1415 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart);
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1416
|
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1417 /**
|
|
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1418 * @}
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1419 */
|
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1420
|
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1421 /**
|
|
|
1422 * @}
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1423 */
|
|
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1424
|
|
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1425 /**
|
|
|
1426 * @}
|
|
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1427 */
|
|
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1428
|
|
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1429 #ifdef __cplusplus
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|
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1430 }
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|
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1431 #endif
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1432
|
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1433 #endif /* __STM32L4xx_HAL_UART_H */
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1434
|
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1435 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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