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1 /* ----------------------------------------------------------------------
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2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
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3 *
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4 * $Date: 19. March 2015
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5 * $Revision: V.1.4.5
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6 *
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7 * Project: CMSIS DSP Library
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8 * Title: arm_shift_q7.c
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9 *
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10 * Description: Processing function for the Q7 Shifting
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11 *
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12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
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13 *
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14 * Redistribution and use in source and binary forms, with or without
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15 * modification, are permitted provided that the following conditions
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16 * are met:
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17 * - Redistributions of source code must retain the above copyright
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18 * notice, this list of conditions and the following disclaimer.
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19 * - Redistributions in binary form must reproduce the above copyright
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20 * notice, this list of conditions and the following disclaimer in
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21 * the documentation and/or other materials provided with the
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22 * distribution.
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23 * - Neither the name of ARM LIMITED nor the names of its contributors
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24 * may be used to endorse or promote products derived from this
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25 * software without specific prior written permission.
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26 *
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27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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38 * POSSIBILITY OF SUCH DAMAGE.
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39 * -------------------------------------------------------------------- */
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40
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41 #include "arm_math.h"
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42
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43 /**
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44 * @ingroup groupMath
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45 */
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46
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47 /**
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48 * @addtogroup shift
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49 * @{
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50 */
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51
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52
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53 /**
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54 * @brief Shifts the elements of a Q7 vector a specified number of bits.
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55 * @param[in] *pSrc points to the input vector
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56 * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
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57 * @param[out] *pDst points to the output vector
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58 * @param[in] blockSize number of samples in the vector
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59 * @return none.
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60 *
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61 * \par Conditions for optimum performance
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62 * Input and output buffers should be aligned by 32-bit
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63 *
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64 *
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65 * <b>Scaling and Overflow Behavior:</b>
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66 * \par
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67 * The function uses saturating arithmetic.
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68 * Results outside of the allowable Q7 range [0x8 0x7F] will be saturated.
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69 */
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70
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71 void arm_shift_q7(
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72 q7_t * pSrc,
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73 int8_t shiftBits,
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74 q7_t * pDst,
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75 uint32_t blockSize)
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76 {
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77 uint32_t blkCnt; /* loop counter */
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78 uint8_t sign; /* Sign of shiftBits */
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79
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80 #ifndef ARM_MATH_CM0_FAMILY
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81
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82 /* Run the below code for Cortex-M4 and Cortex-M3 */
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83 q7_t in1; /* Input value1 */
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84 q7_t in2; /* Input value2 */
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85 q7_t in3; /* Input value3 */
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86 q7_t in4; /* Input value4 */
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87
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88
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89 /*loop Unrolling */
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90 blkCnt = blockSize >> 2u;
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91
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92 /* Getting the sign of shiftBits */
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93 sign = (shiftBits & 0x80);
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94
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95 /* If the shift value is positive then do right shift else left shift */
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96 if(sign == 0u)
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97 {
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98 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
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99 ** a second loop below computes the remaining 1 to 3 samples. */
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100 while(blkCnt > 0u)
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101 {
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102 /* C = A << shiftBits */
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103 /* Read 4 inputs */
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104 in1 = *pSrc;
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105 in2 = *(pSrc + 1);
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106 in3 = *(pSrc + 2);
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107 in4 = *(pSrc + 3);
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108
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109 /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
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110 *__SIMD32(pDst)++ = __PACKq7(__SSAT((in1 << shiftBits), 8),
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111 __SSAT((in2 << shiftBits), 8),
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112 __SSAT((in3 << shiftBits), 8),
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113 __SSAT((in4 << shiftBits), 8));
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114 /* Update source pointer to process next sampels */
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115 pSrc += 4u;
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116
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117 /* Decrement the loop counter */
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118 blkCnt--;
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119 }
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120
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121 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
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122 ** No loop unrolling is used. */
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123 blkCnt = blockSize % 0x4u;
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124
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125 while(blkCnt > 0u)
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126 {
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127 /* C = A << shiftBits */
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128 /* Shift the input and then store the result in the destination buffer. */
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129 *pDst++ = (q7_t) __SSAT((*pSrc++ << shiftBits), 8);
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130
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131 /* Decrement the loop counter */
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132 blkCnt--;
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133 }
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134 }
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135 else
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136 {
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137 shiftBits = -shiftBits;
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138 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
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139 ** a second loop below computes the remaining 1 to 3 samples. */
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140 while(blkCnt > 0u)
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141 {
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142 /* C = A >> shiftBits */
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143 /* Read 4 inputs */
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144 in1 = *pSrc;
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145 in2 = *(pSrc + 1);
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146 in3 = *(pSrc + 2);
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147 in4 = *(pSrc + 3);
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148
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149 /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
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150 *__SIMD32(pDst)++ = __PACKq7((in1 >> shiftBits), (in2 >> shiftBits),
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151 (in3 >> shiftBits), (in4 >> shiftBits));
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152
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153
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154 pSrc += 4u;
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155
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156 /* Decrement the loop counter */
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157 blkCnt--;
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158 }
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159
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160 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
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161 ** No loop unrolling is used. */
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162 blkCnt = blockSize % 0x4u;
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163
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164 while(blkCnt > 0u)
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165 {
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166 /* C = A >> shiftBits */
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167 /* Shift the input and then store the result in the destination buffer. */
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168 in1 = *pSrc++;
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169 *pDst++ = (in1 >> shiftBits);
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170
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171 /* Decrement the loop counter */
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172 blkCnt--;
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173 }
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174 }
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175
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176 #else
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177
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178 /* Run the below code for Cortex-M0 */
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179
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180 /* Getting the sign of shiftBits */
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181 sign = (shiftBits & 0x80);
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182
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183 /* If the shift value is positive then do right shift else left shift */
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184 if(sign == 0u)
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185 {
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186 /* Initialize blkCnt with number of samples */
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187 blkCnt = blockSize;
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188
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189 while(blkCnt > 0u)
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190 {
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191 /* C = A << shiftBits */
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192 /* Shift the input and then store the result in the destination buffer. */
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193 *pDst++ = (q7_t) __SSAT(((q15_t) * pSrc++ << shiftBits), 8);
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194
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195 /* Decrement the loop counter */
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196 blkCnt--;
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197 }
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198 }
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199 else
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200 {
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201 /* Initialize blkCnt with number of samples */
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202 blkCnt = blockSize;
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203
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204 while(blkCnt > 0u)
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205 {
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206 /* C = A >> shiftBits */
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207 /* Shift the input and then store the result in the destination buffer. */
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208 *pDst++ = (*pSrc++ >> -shiftBits);
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209
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210 /* Decrement the loop counter */
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211 blkCnt--;
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212 }
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213 }
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214
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215 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
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216 }
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217
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218 /**
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219 * @} end of shift group
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220 */
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