annotate f103c8/Drivers/CMSIS/DSP_Lib/Source/CommonTables/arm_const_structs.c @ 4:ca4f5b55b391

working on pwm
author cin
date Wed, 18 Jan 2017 03:27:00 +0300
parents 0c59e7a7782a
children
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1 /* ----------------------------------------------------------------------
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2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
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3 *
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4 * $Date: 19. March 2015
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5 * $Revision: V.1.4.5
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6 *
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7 * Project: CMSIS DSP Library
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8 * Title: arm_const_structs.c
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9 *
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10 * Description: This file has constant structs that are initialized for
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11 * user convenience. For example, some can be given as
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12 * arguments to the arm_cfft_f32() function.
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13 *
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14 * Target Processor: Cortex-M4/Cortex-M3
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15 *
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16 * Redistribution and use in source and binary forms, with or without
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17 * modification, are permitted provided that the following conditions
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18 * are met:
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19 * - Redistributions of source code must retain the above copyright
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20 * notice, this list of conditions and the following disclaimer.
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21 * - Redistributions in binary form must reproduce the above copyright
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22 * notice, this list of conditions and the following disclaimer in
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23 * the documentation and/or other materials provided with the
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24 * distribution.
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25 * - Neither the name of ARM LIMITED nor the names of its contributors
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26 * may be used to endorse or promote products derived from this
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27 * software without specific prior written permission.
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28 *
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29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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32 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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33 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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34 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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35 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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36 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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37 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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38 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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39 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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40 * POSSIBILITY OF SUCH DAMAGE.
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41 * -------------------------------------------------------------------- */
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42
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43 #include "arm_const_structs.h"
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44
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45 //Floating-point structs
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46
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47 const arm_cfft_instance_f32 arm_cfft_sR_f32_len16 = {
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48 16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE__16_TABLE_LENGTH
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49 };
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50
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51 const arm_cfft_instance_f32 arm_cfft_sR_f32_len32 = {
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52 32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE__32_TABLE_LENGTH
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53 };
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54
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55 const arm_cfft_instance_f32 arm_cfft_sR_f32_len64 = {
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56 64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE__64_TABLE_LENGTH
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57 };
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58
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59 const arm_cfft_instance_f32 arm_cfft_sR_f32_len128 = {
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60 128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH
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61 };
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62
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63 const arm_cfft_instance_f32 arm_cfft_sR_f32_len256 = {
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64 256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH
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65 };
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66
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67 const arm_cfft_instance_f32 arm_cfft_sR_f32_len512 = {
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68 512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH
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69 };
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70
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71 const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024 = {
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72 1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE1024_TABLE_LENGTH
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73 };
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74
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75 const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048 = {
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76 2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE2048_TABLE_LENGTH
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77 };
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78
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79 const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096 = {
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80 4096, twiddleCoef_4096, armBitRevIndexTable4096, ARMBITREVINDEXTABLE4096_TABLE_LENGTH
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81 };
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82
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83 //Fixed-point structs
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84
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85 const arm_cfft_instance_q31 arm_cfft_sR_q31_len16 = {
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86 16, twiddleCoef_16_q31, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH
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87 };
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88
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89 const arm_cfft_instance_q31 arm_cfft_sR_q31_len32 = {
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90 32, twiddleCoef_32_q31, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH
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91 };
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92
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93 const arm_cfft_instance_q31 arm_cfft_sR_q31_len64 = {
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94 64, twiddleCoef_64_q31, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH
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95 };
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96
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97 const arm_cfft_instance_q31 arm_cfft_sR_q31_len128 = {
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98 128, twiddleCoef_128_q31, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH
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99 };
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100
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101 const arm_cfft_instance_q31 arm_cfft_sR_q31_len256 = {
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102 256, twiddleCoef_256_q31, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH
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103 };
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104
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105 const arm_cfft_instance_q31 arm_cfft_sR_q31_len512 = {
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106 512, twiddleCoef_512_q31, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH
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107 };
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108
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109 const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024 = {
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110 1024, twiddleCoef_1024_q31, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
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111 };
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112
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113 const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048 = {
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114 2048, twiddleCoef_2048_q31, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
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115 };
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116
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117 const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096 = {
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118 4096, twiddleCoef_4096_q31, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
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119 };
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120
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121
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122 const arm_cfft_instance_q15 arm_cfft_sR_q15_len16 = {
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123 16, twiddleCoef_16_q15, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH
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124 };
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125
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126 const arm_cfft_instance_q15 arm_cfft_sR_q15_len32 = {
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127 32, twiddleCoef_32_q15, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH
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128 };
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129
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130 const arm_cfft_instance_q15 arm_cfft_sR_q15_len64 = {
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131 64, twiddleCoef_64_q15, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH
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132 };
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133
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134 const arm_cfft_instance_q15 arm_cfft_sR_q15_len128 = {
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135 128, twiddleCoef_128_q15, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH
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136 };
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137
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138 const arm_cfft_instance_q15 arm_cfft_sR_q15_len256 = {
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139 256, twiddleCoef_256_q15, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH
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140 };
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141
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142 const arm_cfft_instance_q15 arm_cfft_sR_q15_len512 = {
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143 512, twiddleCoef_512_q15, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH
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144 };
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145
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146 const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024 = {
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147 1024, twiddleCoef_1024_q15, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
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148 };
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149
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150 const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048 = {
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151 2048, twiddleCoef_2048_q15, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
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152 };
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153
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154 const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096 = {
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155 4096, twiddleCoef_4096_q15, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
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156 };