annotate f103c8/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h @ 4:ca4f5b55b391

working on pwm
author cin
date Wed, 18 Jan 2017 03:27:00 +0300
parents 0c59e7a7782a
children
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1 /**
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2 ******************************************************************************
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3 * @file stm32f1xx_hal.h
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4 * @author MCD Application Team
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5 * @version V1.0.4
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6 * @date 29-April-2016
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7 * @brief This file contains all the functions prototypes for the HAL
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8 * module driver.
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9 ******************************************************************************
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10 * @attention
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11 *
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12 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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13 *
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14 * Redistribution and use in source and binary forms, with or without modification,
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15 * are permitted provided that the following conditions are met:
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16 * 1. Redistributions of source code must retain the above copyright notice,
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17 * this list of conditions and the following disclaimer.
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18 * 2. Redistributions in binary form must reproduce the above copyright notice,
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19 * this list of conditions and the following disclaimer in the documentation
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20 * and/or other materials provided with the distribution.
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21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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22 * may be used to endorse or promote products derived from this software
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23 * without specific prior written permission.
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24 *
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25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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35 *
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36 ******************************************************************************
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37 */
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38
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39 /* Define to prevent recursive inclusion -------------------------------------*/
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40 #ifndef __STM32F1xx_HAL_H
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41 #define __STM32F1xx_HAL_H
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42
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43 #ifdef __cplusplus
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44 extern "C" {
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45 #endif
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46
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47 /* Includes ------------------------------------------------------------------*/
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48 #include "stm32f1xx_hal_conf.h"
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49
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50 /** @addtogroup STM32F1xx_HAL_Driver
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51 * @{
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52 */
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53
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54 /** @addtogroup HAL
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55 * @{
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56 */
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57
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58 /* Exported types ------------------------------------------------------------*/
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59 /* Exported constants --------------------------------------------------------*/
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60
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61 /* Exported macro ------------------------------------------------------------*/
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62
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63 /** @defgroup HAL_Exported_Macros HAL Exported Macros
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64 * @{
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65 */
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66
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67 /** @defgroup DBGMCU_Freeze_Unfreeze Freeze Unfreeze Peripherals in Debug mode
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68 * @brief Freeze/Unfreeze Peripherals in Debug mode
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69 * Note: On devices STM32F10xx8 and STM32F10xxB,
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70 * STM32F101xC/D/E and STM32F103xC/D/E,
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71 * STM32F101xF/G and STM32F103xF/G
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72 * STM32F10xx4 and STM32F10xx6
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73 * Debug registers DBGMCU_IDCODE and DBGMCU_CR are accessible only in
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74 * debug mode (not accessible by the user software in normal mode).
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75 * Refer to errata sheet of these devices for more details.
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76 * @{
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77 */
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78
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79 /* Peripherals on APB1 */
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80 /**
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81 * @brief TIM2 Peripherals Debug mode
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82 */
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83 #define __HAL_DBGMCU_FREEZE_TIM2() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP)
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84 #define __HAL_DBGMCU_UNFREEZE_TIM2() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP)
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85
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86 /**
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87 * @brief TIM3 Peripherals Debug mode
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88 */
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89 #define __HAL_DBGMCU_FREEZE_TIM3() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP)
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90 #define __HAL_DBGMCU_UNFREEZE_TIM3() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP)
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91
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92 #if defined (DBGMCU_CR_DBG_TIM4_STOP)
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93 /**
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94 * @brief TIM4 Peripherals Debug mode
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95 */
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96 #define __HAL_DBGMCU_FREEZE_TIM4() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP)
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97 #define __HAL_DBGMCU_UNFREEZE_TIM4() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP)
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98 #endif
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99
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100 #if defined (DBGMCU_CR_DBG_TIM5_STOP)
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101 /**
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102 * @brief TIM5 Peripherals Debug mode
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103 */
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104 #define __HAL_DBGMCU_FREEZE_TIM5() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP)
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105 #define __HAL_DBGMCU_UNFREEZE_TIM5() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP)
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106 #endif
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107
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108 #if defined (DBGMCU_CR_DBG_TIM6_STOP)
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109 /**
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110 * @brief TIM6 Peripherals Debug mode
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111 */
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112 #define __HAL_DBGMCU_FREEZE_TIM6() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP)
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113 #define __HAL_DBGMCU_UNFREEZE_TIM6() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP)
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114 #endif
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115
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116 #if defined (DBGMCU_CR_DBG_TIM7_STOP)
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117 /**
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118 * @brief TIM7 Peripherals Debug mode
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119 */
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120 #define __HAL_DBGMCU_FREEZE_TIM7() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM7_STOP)
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121 #define __HAL_DBGMCU_UNFREEZE_TIM7() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM7_STOP)
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122 #endif
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123
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124 #if defined (DBGMCU_CR_DBG_TIM12_STOP)
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125 /**
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126 * @brief TIM12 Peripherals Debug mode
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127 */
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128 #define __HAL_DBGMCU_FREEZE_TIM12() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM12_STOP)
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129 #define __HAL_DBGMCU_UNFREEZE_TIM12() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM12_STOP)
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130 #endif
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131
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132 #if defined (DBGMCU_CR_DBG_TIM13_STOP)
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133 /**
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134 * @brief TIM13 Peripherals Debug mode
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135 */
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136 #define __HAL_DBGMCU_FREEZE_TIM13() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM13_STOP)
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137 #define __HAL_DBGMCU_UNFREEZE_TIM13() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM13_STOP)
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138 #endif
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139
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140 #if defined (DBGMCU_CR_DBG_TIM14_STOP)
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141 /**
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142 * @brief TIM14 Peripherals Debug mode
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143 */
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144 #define __HAL_DBGMCU_FREEZE_TIM14() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM14_STOP)
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145 #define __HAL_DBGMCU_UNFREEZE_TIM14() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM14_STOP)
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146 #endif
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147
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148 /**
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149 * @brief WWDG Peripherals Debug mode
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150 */
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151 #define __HAL_DBGMCU_FREEZE_WWDG() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_WWDG_STOP)
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152 #define __HAL_DBGMCU_UNFREEZE_WWDG() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_WWDG_STOP)
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153
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154 /**
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155 * @brief IWDG Peripherals Debug mode
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156 */
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157 #define __HAL_DBGMCU_FREEZE_IWDG() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_IWDG_STOP)
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158 #define __HAL_DBGMCU_UNFREEZE_IWDG() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_IWDG_STOP)
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159
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160 /**
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161 * @brief I2C1 Peripherals Debug mode
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162 */
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163 #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT)
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164 #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT)
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165
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166 #if defined (DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT)
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167 /**
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168 * @brief I2C2 Peripherals Debug mode
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169 */
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170 #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT)
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171 #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT)
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172 #endif
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173
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174 #if defined (DBGMCU_CR_DBG_CAN1_STOP)
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175 /**
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176 * @brief CAN1 Peripherals Debug mode
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177 */
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178 #define __HAL_DBGMCU_FREEZE_CAN1() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN1_STOP)
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179 #define __HAL_DBGMCU_UNFREEZE_CAN1() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN1_STOP)
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180 #endif
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181
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182 #if defined (DBGMCU_CR_DBG_CAN2_STOP)
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183 /**
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184 * @brief CAN2 Peripherals Debug mode
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185 */
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186 #define __HAL_DBGMCU_FREEZE_CAN2() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN2_STOP)
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187 #define __HAL_DBGMCU_UNFREEZE_CAN2() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN2_STOP)
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188 #endif
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189
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190 /* Peripherals on APB2 */
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191 #if defined (DBGMCU_CR_DBG_TIM1_STOP)
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192 /**
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193 * @brief TIM1 Peripherals Debug mode
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194 */
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195 #define __HAL_DBGMCU_FREEZE_TIM1() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM1_STOP)
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196 #define __HAL_DBGMCU_UNFREEZE_TIM1() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM1_STOP)
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197 #endif
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198
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199 #if defined (DBGMCU_CR_DBG_TIM8_STOP)
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200 /**
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201 * @brief TIM8 Peripherals Debug mode
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202 */
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203 #define __HAL_DBGMCU_FREEZE_TIM8() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM8_STOP)
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204 #define __HAL_DBGMCU_UNFREEZE_TIM8() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM8_STOP)
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205 #endif
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206
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207 #if defined (DBGMCU_CR_DBG_TIM9_STOP)
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208 /**
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209 * @brief TIM9 Peripherals Debug mode
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210 */
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211 #define __HAL_DBGMCU_FREEZE_TIM9() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM9_STOP)
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212 #define __HAL_DBGMCU_UNFREEZE_TIM9() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM9_STOP)
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213 #endif
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214
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215 #if defined (DBGMCU_CR_DBG_TIM10_STOP)
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216 /**
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217 * @brief TIM10 Peripherals Debug mode
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218 */
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219 #define __HAL_DBGMCU_FREEZE_TIM10() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM10_STOP)
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220 #define __HAL_DBGMCU_UNFREEZE_TIM10() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM10_STOP)
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221 #endif
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222
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223 #if defined (DBGMCU_CR_DBG_TIM11_STOP)
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224 /**
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225 * @brief TIM11 Peripherals Debug mode
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226 */
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227 #define __HAL_DBGMCU_FREEZE_TIM11() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM11_STOP)
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228 #define __HAL_DBGMCU_UNFREEZE_TIM11() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM11_STOP)
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229 #endif
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230
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231
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232 #if defined (DBGMCU_CR_DBG_TIM15_STOP)
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233 /**
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234 * @brief TIM15 Peripherals Debug mode
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235 */
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236 #define __HAL_DBGMCU_FREEZE_TIM15() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM15_STOP)
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237 #define __HAL_DBGMCU_UNFREEZE_TIM15() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM15_STOP)
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238 #endif
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239
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240 #if defined (DBGMCU_CR_DBG_TIM16_STOP)
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241 /**
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242 * @brief TIM16 Peripherals Debug mode
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243 */
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244 #define __HAL_DBGMCU_FREEZE_TIM16() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM16_STOP)
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245 #define __HAL_DBGMCU_UNFREEZE_TIM16() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM16_STOP)
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246 #endif
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247
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248 #if defined (DBGMCU_CR_DBG_TIM17_STOP)
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249 /**
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250 * @brief TIM17 Peripherals Debug mode
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251 */
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252 #define __HAL_DBGMCU_FREEZE_TIM17() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM17_STOP)
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253 #define __HAL_DBGMCU_UNFREEZE_TIM17() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM17_STOP)
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254 #endif
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255
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256 /**
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257 * @}
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258 */
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259
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260 /**
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261 * @}
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262 */
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263
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264 /* Exported functions --------------------------------------------------------*/
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265
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266 /** @addtogroup HAL_Exported_Functions
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267 * @{
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268 */
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269
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270 /** @addtogroup HAL_Exported_Functions_Group1
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271 * @{
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272 */
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273
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274 /* Initialization and de-initialization functions ******************************/
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275 HAL_StatusTypeDef HAL_Init(void);
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276 HAL_StatusTypeDef HAL_DeInit(void);
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277 void HAL_MspInit(void);
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278 void HAL_MspDeInit(void);
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279 HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
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280
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281 /**
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282 * @}
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283 */
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284
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285 /** @addtogroup HAL_Exported_Functions_Group2
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286 * @{
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287 */
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288
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289 /* Peripheral Control functions ************************************************/
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290 void HAL_IncTick(void);
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291 void HAL_Delay(__IO uint32_t Delay);
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292 uint32_t HAL_GetTick(void);
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293 void HAL_SuspendTick(void);
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294 void HAL_ResumeTick(void);
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295 uint32_t HAL_GetHalVersion(void);
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296 uint32_t HAL_GetREVID(void);
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297 uint32_t HAL_GetDEVID(void);
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298 void HAL_DBGMCU_EnableDBGSleepMode(void);
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299 void HAL_DBGMCU_DisableDBGSleepMode(void);
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300 void HAL_DBGMCU_EnableDBGStopMode(void);
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301 void HAL_DBGMCU_DisableDBGStopMode(void);
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302 void HAL_DBGMCU_EnableDBGStandbyMode(void);
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303 void HAL_DBGMCU_DisableDBGStandbyMode(void);
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304
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305 /**
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306 * @}
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307 */
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308
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309 /**
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310 * @}
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311 */
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312
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313
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314 /**
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315 * @}
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316 */
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317
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318 /**
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319 * @}
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320 */
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321
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322 #ifdef __cplusplus
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323 }
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324 #endif
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325
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326 #endif /* __STM32F1xx_HAL_H */
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327
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328 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/