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1 /**
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2 ******************************************************************************
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3 * @file stm32f1xx_hal_dma_ex.h
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4 * @author MCD Application Team
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5 * @version V1.0.4
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6 * @date 29-April-2016
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7 * @brief Header file of DMA HAL extension module.
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8 ******************************************************************************
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9 * @attention
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10 *
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11 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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12 *
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13 * Redistribution and use in source and binary forms, with or without modification,
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14 * are permitted provided that the following conditions are met:
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15 * 1. Redistributions of source code must retain the above copyright notice,
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16 * this list of conditions and the following disclaimer.
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17 * 2. Redistributions in binary form must reproduce the above copyright notice,
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18 * this list of conditions and the following disclaimer in the documentation
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19 * and/or other materials provided with the distribution.
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20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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21 * may be used to endorse or promote products derived from this software
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22 * without specific prior written permission.
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23 *
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24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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34 *
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35 ******************************************************************************
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36 */
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37
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38 /* Define to prevent recursive inclusion -------------------------------------*/
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39 #ifndef __STM32F1xx_HAL_DMA_EX_H
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40 #define __STM32F1xx_HAL_DMA_EX_H
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41
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42 #ifdef __cplusplus
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43 extern "C" {
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44 #endif
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45
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46 /* Includes ------------------------------------------------------------------*/
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47 #include "stm32f1xx_hal_def.h"
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48
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49 /** @addtogroup STM32F1xx_HAL_Driver
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50 * @{
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51 */
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52
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53 /** @defgroup DMAEx DMAEx
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54 * @{
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55 */
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56
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57 /* Exported types ------------------------------------------------------------*/
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58 /* Exported constants --------------------------------------------------------*/
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59 /* Exported macro ------------------------------------------------------------*/
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60 /** @defgroup DMAEx_Exported_Macros DMA Extended Exported Macros
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61 * @{
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62 */
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63 /* Interrupt & Flag management */
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64 #if defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || \
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65 defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
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66 /** @defgroup DMAEx_High_density_XL_density_Product_devices DMAEx High density and XL density product devices
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67 * @{
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68 */
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69
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70 /**
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71 * @brief Returns the current DMA Channel transfer complete flag.
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72 * @param __HANDLE__: DMA handle
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73 * @retval The specified transfer complete flag index.
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74 */
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75 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
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76 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
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77 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
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78 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
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79 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
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80 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
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81 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
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82 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TC7 :\
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83 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\
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84 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\
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85 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\
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86 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\
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87 DMA_FLAG_TC5)
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88
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89 /**
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90 * @brief Returns the current DMA Channel half transfer complete flag.
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91 * @param __HANDLE__: DMA handle
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92 * @retval The specified half transfer complete flag index.
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93 */
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94 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
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95 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
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96 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
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97 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
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98 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
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99 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
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100 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
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101 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_HT7 :\
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102 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\
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103 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\
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104 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\
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105 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\
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106 DMA_FLAG_HT5)
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107
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108 /**
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109 * @brief Returns the current DMA Channel transfer error flag.
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110 * @param __HANDLE__: DMA handle
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111 * @retval The specified transfer error flag index.
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112 */
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113 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
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114 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
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115 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
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116 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
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117 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
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118 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
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119 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
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120 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TE7 :\
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121 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\
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122 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\
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123 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\
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124 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\
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125 DMA_FLAG_TE5)
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126
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127 /**
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128 * @brief Get the DMA Channel pending flags.
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129 * @param __HANDLE__: DMA handle
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130 * @param __FLAG__: Get the specified flag.
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131 * This parameter can be any combination of the following values:
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132 * @arg DMA_FLAG_TCx: Transfer complete flag
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133 * @arg DMA_FLAG_HTx: Half transfer complete flag
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134 * @arg DMA_FLAG_TEx: Transfer error flag
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135 * Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.
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136 * @retval The state of FLAG (SET or RESET).
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137 */
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138 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\
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139 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->ISR & (__FLAG__)) :\
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140 (DMA1->ISR & (__FLAG__)))
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141
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142 /**
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143 * @brief Clears the DMA Channel pending flags.
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144 * @param __HANDLE__: DMA handle
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145 * @param __FLAG__: specifies the flag to clear.
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146 * This parameter can be any combination of the following values:
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147 * @arg DMA_FLAG_TCx: Transfer complete flag
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148 * @arg DMA_FLAG_HTx: Half transfer complete flag
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149 * @arg DMA_FLAG_TEx: Transfer error flag
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150 * Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.
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151 * @retval None
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152 */
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153 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \
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154 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->IFCR = (__FLAG__)) :\
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155 (DMA1->IFCR = (__FLAG__)))
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156
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157 /**
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158 * @}
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159 */
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160
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161 #else
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162 /** @defgroup DMA_Low_density_Medium_density_Product_devices DMA Low density and Medium density product devices
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163 * @{
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164 */
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165
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166 /**
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167 * @brief Returns the current DMA Channel transfer complete flag.
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168 * @param __HANDLE__: DMA handle
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169 * @retval The specified transfer complete flag index.
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170 */
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171 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
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172 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
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173 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
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174 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
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175 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
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176 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
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177 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
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178 DMA_FLAG_TC7)
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179
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180 /**
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181 * @brief Returns the current DMA Channel half transfer complete flag.
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182 * @param __HANDLE__: DMA handle
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183 * @retval The specified half transfer complete flag index.
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184 */
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185 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
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186 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
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187 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
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188 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
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189 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
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190 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
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191 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
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192 DMA_FLAG_HT7)
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193
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194 /**
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195 * @brief Returns the current DMA Channel transfer error flag.
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196 * @param __HANDLE__: DMA handle
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197 * @retval The specified transfer error flag index.
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198 */
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199 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
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200 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
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201 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
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202 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
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203 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
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204 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
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205 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
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206 DMA_FLAG_TE7)
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207
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208 /**
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209 * @brief Get the DMA Channel pending flags.
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210 * @param __HANDLE__: DMA handle
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211 * @param __FLAG__: Get the specified flag.
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212 * This parameter can be any combination of the following values:
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213 * @arg DMA_FLAG_TCx: Transfer complete flag
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214 * @arg DMA_FLAG_HTx: Half transfer complete flag
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215 * @arg DMA_FLAG_TEx: Transfer error flag
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216 * Where x can be 1_7 to select the DMA Channel flag.
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217 * @retval The state of FLAG (SET or RESET).
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218 */
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219
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220 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (DMA1->ISR & (__FLAG__))
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221
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222 /**
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223 * @brief Clears the DMA Channel pending flags.
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224 * @param __HANDLE__: DMA handle
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225 * @param __FLAG__: specifies the flag to clear.
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226 * This parameter can be any combination of the following values:
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227 * @arg DMA_FLAG_TCx: Transfer complete flag
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228 * @arg DMA_FLAG_HTx: Half transfer complete flag
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229 * @arg DMA_FLAG_TEx: Transfer error flag
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230 * Where x can be 1_7 to select the DMA Channel flag.
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231 * @retval None
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232 */
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233 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__))
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234
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235 /**
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236 * @}
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237 */
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238
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239 #endif
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240
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241 /**
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242 * @}
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243 */
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244
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245 /**
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246 * @}
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247 */
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248
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249 /**
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250 * @}
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251 */
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252
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253 #ifdef __cplusplus
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254 }
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255 #endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || */
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256 /* STM32F103xG || STM32F105xC || STM32F107xC */
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257
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258 #endif /* __STM32F1xx_HAL_DMA_H */
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259
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260 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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