annotate f103c8/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h @ 4:ca4f5b55b391

working on pwm
author cin
date Wed, 18 Jan 2017 03:27:00 +0300
parents 0c59e7a7782a
children
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1 /**
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2 ******************************************************************************
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3 * @file stm32f1xx_hal_flash_ex.h
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4 * @author MCD Application Team
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5 * @version V1.0.4
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6 * @date 29-April-2016
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7 * @brief Header file of Flash HAL Extended module.
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8 ******************************************************************************
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9 * @attention
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10 *
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11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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12 *
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13 * Redistribution and use in source and binary forms, with or without modification,
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14 * are permitted provided that the following conditions are met:
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15 * 1. Redistributions of source code must retain the above copyright notice,
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16 * this list of conditions and the following disclaimer.
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17 * 2. Redistributions in binary form must reproduce the above copyright notice,
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18 * this list of conditions and the following disclaimer in the documentation
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19 * and/or other materials provided with the distribution.
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20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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21 * may be used to endorse or promote products derived from this software
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22 * without specific prior written permission.
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23 *
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24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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34 *
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35 ******************************************************************************
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36 */
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37
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38 /* Define to prevent recursive inclusion -------------------------------------*/
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39 #ifndef __STM32F1xx_HAL_FLASH_EX_H
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40 #define __STM32F1xx_HAL_FLASH_EX_H
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41
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42 #ifdef __cplusplus
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43 extern "C" {
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44 #endif
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45
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46 /* Includes ------------------------------------------------------------------*/
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47 #include "stm32f1xx_hal_def.h"
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48
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49 /** @addtogroup STM32F1xx_HAL_Driver
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50 * @{
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51 */
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52
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53 /** @addtogroup FLASHEx
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54 * @{
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55 */
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56
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57 /** @addtogroup FLASHEx_Private_Constants
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58 * @{
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59 */
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60
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61 #define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFFF7E0)
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62 #define OBR_REG_INDEX ((uint32_t)1)
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63 #define SR_FLAG_MASK ((uint32_t)(FLASH_SR_BSY | FLASH_SR_PGERR | FLASH_SR_WRPRTERR | FLASH_SR_EOP))
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64
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65 /**
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66 * @}
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67 */
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68
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69 /** @addtogroup FLASHEx_Private_Macros
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70 * @{
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71 */
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72
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73 #define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_PAGES) || ((VALUE) == FLASH_TYPEERASE_MASSERASE))
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74
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75 #define IS_OPTIONBYTE(VALUE) (((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_DATA)))
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76
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77 #define IS_WRPSTATE(VALUE) (((VALUE) == OB_WRPSTATE_DISABLE) || ((VALUE) == OB_WRPSTATE_ENABLE))
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78
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79 #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) || ((LEVEL) == OB_RDP_LEVEL_1))
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80
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81 #define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == OB_DATA_ADDRESS_DATA0) || ((ADDRESS) == OB_DATA_ADDRESS_DATA1))
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82
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83 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
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84
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85 #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST))
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86
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87 #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST))
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88
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89 #if defined(FLASH_BANK2_END)
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90 #define IS_OB_BOOT1(BOOT1) (((BOOT1) == OB_BOOT1_RESET) || ((BOOT1) == OB_BOOT1_SET))
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91 #endif /* FLASH_BANK2_END */
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92
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93 /* Low Density */
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94 #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6))
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95 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08007FFF) : \
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96 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08003FFF))
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97 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */
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98
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99 /* Medium Density */
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100 #if (defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB))
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101 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFF) : \
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102 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFF) : \
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103 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08007FFF) : \
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104 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08003FFF))))
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105 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/
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106
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107 /* High Density */
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108 #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE))
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109 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0807FFFF) : \
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110 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0805FFFF) : \
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111 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFF)))
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112 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */
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113
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114 /* XL Density */
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115 #if defined(FLASH_BANK2_END)
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116 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080FFFFF) : \
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117 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080BFFFF))
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118 #endif /* FLASH_BANK2_END */
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119
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120 /* Connectivity Line */
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121 #if (defined(STM32F105xC) || defined(STM32F107xC))
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122 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFF) : \
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123 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFF) : \
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124 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFF)))
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125 #endif /* STM32F105xC || STM32F107xC */
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126
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127 #define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000))
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128
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129 #if defined(FLASH_BANK2_END)
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130 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \
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131 ((BANK) == FLASH_BANK_2) || \
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132 ((BANK) == FLASH_BANK_BOTH))
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133 #else
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134 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1))
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135 #endif /* FLASH_BANK2_END */
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136
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137 /* Low Density */
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138 #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6))
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139 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? \
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140 ((ADDRESS) <= FLASH_BANK1_END) : ((ADDRESS) <= 0x08003FFF)))
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141
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142 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */
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143
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144 /* Medium Density */
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145 #if (defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB))
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146 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? \
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147 ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40) ? \
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148 ((ADDRESS) <= 0x0800FFFF) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? \
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149 ((ADDRESS) <= 0x08007FFF) : ((ADDRESS) <= 0x08003FFF)))))
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150
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151 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/
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152
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153 /* High Density */
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154 #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE))
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155 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200) ? \
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156 ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180) ? \
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157 ((ADDRESS) <= 0x0805FFFF) : ((ADDRESS) <= 0x0803FFFF))))
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158
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159 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */
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160
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161 /* XL Density */
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162 #if defined(FLASH_BANK2_END)
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163 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400) ? \
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164 ((ADDRESS) <= FLASH_BANK2_END) : ((ADDRESS) <= 0x080BFFFF)))
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165
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166 #endif /* FLASH_BANK2_END */
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167
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168 /* Connectivity Line */
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169 #if (defined(STM32F105xC) || defined(STM32F107xC))
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170 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100) ? \
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171 ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? \
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cin
parents:
diff changeset
172 ((ADDRESS) <= 0x0801FFFF) : ((ADDRESS) <= 0x0800FFFF))))
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
173
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
174 #endif /* STM32F105xC || STM32F107xC */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
175
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
176 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
177 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
178 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
179
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
180 /* Exported types ------------------------------------------------------------*/
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
181 /** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
182 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
183 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
184
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
185 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
186 * @brief FLASH Erase structure definition
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
187 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
188 typedef struct
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
189 {
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
190 uint32_t TypeErase; /*!< TypeErase: Mass erase or page erase.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
191 This parameter can be a value of @ref FLASHEx_Type_Erase */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
192
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
193 uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
194 This parameter must be a value of @ref FLASHEx_Banks */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
195
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
196 uint32_t PageAddress; /*!< PageAdress: Initial FLASH page address to erase when mass erase is disabled
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
197 This parameter must be a number between Min_Data = 0x08000000 and Max_Data = FLASH_BANKx_END
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
198 (x = 1 or 2 depending on devices)*/
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
199
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
200 uint32_t NbPages; /*!< NbPages: Number of pagess to be erased.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
201 This parameter must be a value between Min_Data = 1 and Max_Data = (max number of pages - value of initial page)*/
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
202
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
203 } FLASH_EraseInitTypeDef;
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
204
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
205 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
206 * @brief FLASH Options bytes program structure definition
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
207 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
208 typedef struct
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
209 {
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
210 uint32_t OptionType; /*!< OptionType: Option byte to be configured.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
211 This parameter can be a value of @ref FLASHEx_OB_Type */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
212
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
213 uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
214 This parameter can be a value of @ref FLASHEx_OB_WRP_State */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
215
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
216 uint32_t WRPPage; /*!< WRPPage: specifies the page(s) to be write protected
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
217 This parameter can be a value of @ref FLASHEx_OB_Write_Protection */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
218
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
219 uint32_t Banks; /*!< Select banks for WRP activation/deactivation of all sectors.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
220 This parameter must be a value of @ref FLASHEx_Banks */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
221
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
222 uint8_t RDPLevel; /*!< RDPLevel: Set the read protection level..
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
223 This parameter can be a value of @ref FLASHEx_OB_Read_Protection */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
224
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
225 #if defined(FLASH_BANK2_END)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
226 uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte:
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
227 IWDG / STOP / STDBY / BOOT1
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
228 This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP,
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
229 @ref FLASHEx_OB_nRST_STDBY, @ref FLASHEx_OB_BOOT1 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
230 #else
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
231 uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte:
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
232 IWDG / STOP / STDBY
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
233 This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP,
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
234 @ref FLASHEx_OB_nRST_STDBY */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
235 #endif /* FLASH_BANK2_END */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
236
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
237 uint32_t DATAAddress; /*!< DATAAddress: Address of the option byte DATA to be programmed
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
238 This parameter can be a value of @ref FLASHEx_OB_Data_Address */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
239
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
240 uint8_t DATAData; /*!< DATAData: Data to be stored in the option byte DATA
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
241 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
242 } FLASH_OBProgramInitTypeDef;
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
243
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
244 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
245 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
246 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
247
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
248 /* Exported constants --------------------------------------------------------*/
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
249 /** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
250 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
251 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
252
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
253 /** @defgroup FLASHEx_Constants FLASH Constants
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
254 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
255 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
256
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
257 /** @defgroup FLASHEx_Page_Size Page Size
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
258 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
259 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
260 #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) || defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB))
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
261 #define FLASH_PAGE_SIZE ((uint32_t)0x400)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
262 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
263 /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
264
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
265 #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC))
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
266 #define FLASH_PAGE_SIZE ((uint32_t)0x800)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
267 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
268 /* STM32F101xG || STM32F103xG */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
269 /* STM32F105xC || STM32F107xC */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
270
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
271 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
272 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
273 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
274
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
275 /** @defgroup FLASHEx_Type_Erase Type Erase
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
276 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
277 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
278 #define FLASH_TYPEERASE_PAGES ((uint32_t)0x00) /*!<Pages erase only*/
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
279 #define FLASH_TYPEERASE_MASSERASE ((uint32_t)0x02) /*!<Flash mass erase activation*/
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
280
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
281 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
282 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
283 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
284
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
285 /** @defgroup FLASHEx_Banks Banks
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
286 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
287 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
288 #if defined(FLASH_BANK2_END)
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cin
parents:
diff changeset
289 #define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
290 #define FLASH_BANK_2 ((uint32_t)2) /*!< Bank 2 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
291 #define FLASH_BANK_BOTH ((uint32_t)FLASH_BANK_1 | FLASH_BANK_2) /*!< Bank1 and Bank2 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
292
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
293 #else
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
294 #define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
295 #endif
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
296 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
297 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
298 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
299
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
300 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
301 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
302 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
303
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
304 /** @defgroup FLASHEx_OptionByte_Constants Option Byte Constants
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
305 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
306 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
307
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
308 /** @defgroup FLASHEx_OB_Type Option Bytes Type
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
309 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
310 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
311 #define OPTIONBYTE_WRP ((uint32_t)0x01) /*!<WRP option byte configuration*/
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
312 #define OPTIONBYTE_RDP ((uint32_t)0x02) /*!<RDP option byte configuration*/
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
313 #define OPTIONBYTE_USER ((uint32_t)0x04) /*!<USER option byte configuration*/
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
314 #define OPTIONBYTE_DATA ((uint32_t)0x08) /*!<DATA option byte configuration*/
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
315
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
316 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
317 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
318 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
319
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
320 /** @defgroup FLASHEx_OB_WRP_State Option Byte WRP State
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
321 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
322 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
323 #define OB_WRPSTATE_DISABLE ((uint32_t)0x00) /*!<Disable the write protection of the desired pages*/
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
324 #define OB_WRPSTATE_ENABLE ((uint32_t)0x01) /*!<Enable the write protection of the desired pagess*/
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
325
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
326 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
327 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
328 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
329
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
330 /** @defgroup FLASHEx_OB_Write_Protection Option Bytes Write Protection
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
331 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
332 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
333 /* STM32 Low and Medium density devices */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
334 #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
335 || defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
336 || defined(STM32F103xB)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
337 #define OB_WRP_PAGES0TO3 ((uint32_t)0x00000001) /*!< Write protection of page 0 to 3 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
338 #define OB_WRP_PAGES4TO7 ((uint32_t)0x00000002) /*!< Write protection of page 4 to 7 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
339 #define OB_WRP_PAGES8TO11 ((uint32_t)0x00000004) /*!< Write protection of page 8 to 11 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
340 #define OB_WRP_PAGES12TO15 ((uint32_t)0x00000008) /*!< Write protection of page 12 to 15 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
341 #define OB_WRP_PAGES16TO19 ((uint32_t)0x00000010) /*!< Write protection of page 16 to 19 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
342 #define OB_WRP_PAGES20TO23 ((uint32_t)0x00000020) /*!< Write protection of page 20 to 23 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
343 #define OB_WRP_PAGES24TO27 ((uint32_t)0x00000040) /*!< Write protection of page 24 to 27 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
344 #define OB_WRP_PAGES28TO31 ((uint32_t)0x00000080) /*!< Write protection of page 28 to 31 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
345 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
346 /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
347
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
348 /* STM32 Medium-density devices */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
349 #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
350 #define OB_WRP_PAGES32TO35 ((uint32_t)0x00000100) /*!< Write protection of page 32 to 35 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
351 #define OB_WRP_PAGES36TO39 ((uint32_t)0x00000200) /*!< Write protection of page 36 to 39 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
352 #define OB_WRP_PAGES40TO43 ((uint32_t)0x00000400) /*!< Write protection of page 40 to 43 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
353 #define OB_WRP_PAGES44TO47 ((uint32_t)0x00000800) /*!< Write protection of page 44 to 47 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
354 #define OB_WRP_PAGES48TO51 ((uint32_t)0x00001000) /*!< Write protection of page 48 to 51 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
355 #define OB_WRP_PAGES52TO55 ((uint32_t)0x00002000) /*!< Write protection of page 52 to 55 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
356 #define OB_WRP_PAGES56TO59 ((uint32_t)0x00004000) /*!< Write protection of page 56 to 59 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
357 #define OB_WRP_PAGES60TO63 ((uint32_t)0x00008000) /*!< Write protection of page 60 to 63 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
358 #define OB_WRP_PAGES64TO67 ((uint32_t)0x00010000) /*!< Write protection of page 64 to 67 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
359 #define OB_WRP_PAGES68TO71 ((uint32_t)0x00020000) /*!< Write protection of page 68 to 71 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
360 #define OB_WRP_PAGES72TO75 ((uint32_t)0x00040000) /*!< Write protection of page 72 to 75 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
361 #define OB_WRP_PAGES76TO79 ((uint32_t)0x00080000) /*!< Write protection of page 76 to 79 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
362 #define OB_WRP_PAGES80TO83 ((uint32_t)0x00100000) /*!< Write protection of page 80 to 83 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
363 #define OB_WRP_PAGES84TO87 ((uint32_t)0x00200000) /*!< Write protection of page 84 to 87 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
364 #define OB_WRP_PAGES88TO91 ((uint32_t)0x00400000) /*!< Write protection of page 88 to 91 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
365 #define OB_WRP_PAGES92TO95 ((uint32_t)0x00800000) /*!< Write protection of page 92 to 95 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
366 #define OB_WRP_PAGES96TO99 ((uint32_t)0x01000000) /*!< Write protection of page 96 to 99 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
367 #define OB_WRP_PAGES100TO103 ((uint32_t)0x02000000) /*!< Write protection of page 100 to 103 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
368 #define OB_WRP_PAGES104TO107 ((uint32_t)0x04000000) /*!< Write protection of page 104 to 107 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
369 #define OB_WRP_PAGES108TO111 ((uint32_t)0x08000000) /*!< Write protection of page 108 to 111 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
370 #define OB_WRP_PAGES112TO115 ((uint32_t)0x10000000) /*!< Write protection of page 112 to 115 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
371 #define OB_WRP_PAGES116TO119 ((uint32_t)0x20000000) /*!< Write protection of page 115 to 119 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
372 #define OB_WRP_PAGES120TO123 ((uint32_t)0x40000000) /*!< Write protection of page 120 to 123 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
373 #define OB_WRP_PAGES124TO127 ((uint32_t)0x80000000) /*!< Write protection of page 124 to 127 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
374 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
375
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
376
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
377 /* STM32 High-density, XL-density and Connectivity line devices */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
378 #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
379 || defined(STM32F101xG) || defined(STM32F103xG) \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
380 || defined(STM32F105xC) || defined(STM32F107xC)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
381 #define OB_WRP_PAGES0TO1 ((uint32_t)0x00000001) /*!< Write protection of page 0 TO 1 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
382 #define OB_WRP_PAGES2TO3 ((uint32_t)0x00000002) /*!< Write protection of page 2 TO 3 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
383 #define OB_WRP_PAGES4TO5 ((uint32_t)0x00000004) /*!< Write protection of page 4 TO 5 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
384 #define OB_WRP_PAGES6TO7 ((uint32_t)0x00000008) /*!< Write protection of page 6 TO 7 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
385 #define OB_WRP_PAGES8TO9 ((uint32_t)0x00000010) /*!< Write protection of page 8 TO 9 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
386 #define OB_WRP_PAGES10TO11 ((uint32_t)0x00000020) /*!< Write protection of page 10 TO 11 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
387 #define OB_WRP_PAGES12TO13 ((uint32_t)0x00000040) /*!< Write protection of page 12 TO 13 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
388 #define OB_WRP_PAGES14TO15 ((uint32_t)0x00000080) /*!< Write protection of page 14 TO 15 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
389 #define OB_WRP_PAGES16TO17 ((uint32_t)0x00000100) /*!< Write protection of page 16 TO 17 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
390 #define OB_WRP_PAGES18TO19 ((uint32_t)0x00000200) /*!< Write protection of page 18 TO 19 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
391 #define OB_WRP_PAGES20TO21 ((uint32_t)0x00000400) /*!< Write protection of page 20 TO 21 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
392 #define OB_WRP_PAGES22TO23 ((uint32_t)0x00000800) /*!< Write protection of page 22 TO 23 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
393 #define OB_WRP_PAGES24TO25 ((uint32_t)0x00001000) /*!< Write protection of page 24 TO 25 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
394 #define OB_WRP_PAGES26TO27 ((uint32_t)0x00002000) /*!< Write protection of page 26 TO 27 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
395 #define OB_WRP_PAGES28TO29 ((uint32_t)0x00004000) /*!< Write protection of page 28 TO 29 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
396 #define OB_WRP_PAGES30TO31 ((uint32_t)0x00008000) /*!< Write protection of page 30 TO 31 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
397 #define OB_WRP_PAGES32TO33 ((uint32_t)0x00010000) /*!< Write protection of page 32 TO 33 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
398 #define OB_WRP_PAGES34TO35 ((uint32_t)0x00020000) /*!< Write protection of page 34 TO 35 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
399 #define OB_WRP_PAGES36TO37 ((uint32_t)0x00040000) /*!< Write protection of page 36 TO 37 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
400 #define OB_WRP_PAGES38TO39 ((uint32_t)0x00080000) /*!< Write protection of page 38 TO 39 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
401 #define OB_WRP_PAGES40TO41 ((uint32_t)0x00100000) /*!< Write protection of page 40 TO 41 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
402 #define OB_WRP_PAGES42TO43 ((uint32_t)0x00200000) /*!< Write protection of page 42 TO 43 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
403 #define OB_WRP_PAGES44TO45 ((uint32_t)0x00400000) /*!< Write protection of page 44 TO 45 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
404 #define OB_WRP_PAGES46TO47 ((uint32_t)0x00800000) /*!< Write protection of page 46 TO 47 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
405 #define OB_WRP_PAGES48TO49 ((uint32_t)0x01000000) /*!< Write protection of page 48 TO 49 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
406 #define OB_WRP_PAGES50TO51 ((uint32_t)0x02000000) /*!< Write protection of page 50 TO 51 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
407 #define OB_WRP_PAGES52TO53 ((uint32_t)0x04000000) /*!< Write protection of page 52 TO 53 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
408 #define OB_WRP_PAGES54TO55 ((uint32_t)0x08000000) /*!< Write protection of page 54 TO 55 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
409 #define OB_WRP_PAGES56TO57 ((uint32_t)0x10000000) /*!< Write protection of page 56 TO 57 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
410 #define OB_WRP_PAGES58TO59 ((uint32_t)0x20000000) /*!< Write protection of page 58 TO 59 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
411 #define OB_WRP_PAGES60TO61 ((uint32_t)0x40000000) /*!< Write protection of page 60 TO 61 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
412 #define OB_WRP_PAGES62TO127 ((uint32_t)0x80000000) /*!< Write protection of page 62 TO 127 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
413 #define OB_WRP_PAGES62TO255 ((uint32_t)0x80000000) /*!< Write protection of page 62 TO 255 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
414 #define OB_WRP_PAGES62TO511 ((uint32_t)0x80000000) /*!< Write protection of page 62 TO 511 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
415 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
416 /* STM32F101xG || STM32F103xG */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
417 /* STM32F105xC || STM32F107xC */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
418
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
419 #define OB_WRP_ALLPAGES ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Pages */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
420
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
421 /* Low Density */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
422 #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
423 #define OB_WRP_PAGES0TO31MASK ((uint32_t)0x000000FF)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
424 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
425
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
426 /* Medium Density */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
427 #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
428 #define OB_WRP_PAGES0TO31MASK ((uint32_t)0x000000FF)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
429 #define OB_WRP_PAGES32TO63MASK ((uint32_t)0x0000FF00)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
430 #define OB_WRP_PAGES64TO95MASK ((uint32_t)0x00FF0000)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
431 #define OB_WRP_PAGES96TO127MASK ((uint32_t)0xFF000000)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
432 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
433
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
434 /* High Density */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
435 #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
436 #define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
437 #define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
438 #define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
439 #define OB_WRP_PAGES48TO255MASK ((uint32_t)0xFF000000)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
440 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
441
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
442 /* XL Density */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
443 #if defined(STM32F101xG) || defined(STM32F103xG)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
444 #define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
445 #define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
446 #define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
447 #define OB_WRP_PAGES48TO511MASK ((uint32_t)0xFF000000)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
448 #endif /* STM32F101xG || STM32F103xG */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
449
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
450 /* Connectivity line devices */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
451 #if defined(STM32F105xC) || defined(STM32F107xC)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
452 #define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
453 #define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
454 #define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
455 #define OB_WRP_PAGES48TO127MASK ((uint32_t)0xFF000000)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
456 #endif /* STM32F105xC || STM32F107xC */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
457
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
458 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
459 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
460 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
461
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
462 /** @defgroup FLASHEx_OB_Read_Protection Option Byte Read Protection
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
463 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
464 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
465 #define OB_RDP_LEVEL_0 ((uint8_t)0xA5)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
466 #define OB_RDP_LEVEL_1 ((uint8_t)0x00)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
467 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
468 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
469 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
470
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
471 /** @defgroup FLASHEx_OB_IWatchdog Option Byte IWatchdog
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
472 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
473 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
474 #define OB_IWDG_SW ((uint16_t)0x0001) /*!< Software IWDG selected */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
475 #define OB_IWDG_HW ((uint16_t)0x0000) /*!< Hardware IWDG selected */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
476 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
477 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
478 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
479
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
480 /** @defgroup FLASHEx_OB_nRST_STOP Option Byte nRST STOP
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
481 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
482 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
483 #define OB_STOP_NO_RST ((uint16_t)0x0002) /*!< No reset generated when entering in STOP */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
484 #define OB_STOP_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STOP */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
485 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
486 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
487 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
488
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
489 /** @defgroup FLASHEx_OB_nRST_STDBY Option Byte nRST STDBY
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
490 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
491 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
492 #define OB_STDBY_NO_RST ((uint16_t)0x0004) /*!< No reset generated when entering in STANDBY */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
493 #define OB_STDBY_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STANDBY */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
494 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
495 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
496 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
497
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
498 #if defined(FLASH_BANK2_END)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
499 /** @defgroup FLASHEx_OB_BOOT1 Option Byte BOOT1
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
500 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
501 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
502 #define OB_BOOT1_RESET ((uint16_t)0x0000) /*!< BOOT1 Reset */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
503 #define OB_BOOT1_SET ((uint16_t)0x0008) /*!< BOOT1 Set */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
504 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
505 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
506 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
507 #endif /* FLASH_BANK2_END */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
508
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
509 /** @defgroup FLASHEx_OB_Data_Address Option Byte Data Address
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
510 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
511 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
512 #define OB_DATA_ADDRESS_DATA0 ((uint32_t)0x1FFFF804)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
513 #define OB_DATA_ADDRESS_DATA1 ((uint32_t)0x1FFFF806)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
514 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
515 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
516 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
517
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
518 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
519 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
520 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
521
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
522 /** @addtogroup FLASHEx_Constants
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
523 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
524 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
525
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
526 /** @defgroup FLASH_Flag_definition Flag definition
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
527 * @brief Flag definition
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
528 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
529 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
530 #if defined(FLASH_BANK2_END)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
531 #define FLASH_FLAG_BSY FLASH_FLAG_BSY_BANK1 /*!< FLASH Bank1 Busy flag */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
532 #define FLASH_FLAG_PGERR FLASH_FLAG_PGERR_BANK1 /*!< FLASH Bank1 Programming error flag */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
533 #define FLASH_FLAG_WRPERR FLASH_FLAG_WRPERR_BANK1 /*!< FLASH Bank1 Write protected error flag */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
534 #define FLASH_FLAG_EOP FLASH_FLAG_EOP_BANK1 /*!< FLASH Bank1 End of Operation flag */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
535
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
536 #define FLASH_FLAG_BSY_BANK1 FLASH_SR_BSY /*!< FLASH Bank1 Busy flag */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
537 #define FLASH_FLAG_PGERR_BANK1 FLASH_SR_PGERR /*!< FLASH Bank1 Programming error flag */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
538 #define FLASH_FLAG_WRPERR_BANK1 FLASH_SR_WRPRTERR /*!< FLASH Bank1 Write protected error flag */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
539 #define FLASH_FLAG_EOP_BANK1 FLASH_SR_EOP /*!< FLASH Bank1 End of Operation flag */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
540
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
541 #define FLASH_FLAG_BSY_BANK2 (FLASH_SR2_BSY << 16) /*!< FLASH Bank2 Busy flag */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
542 #define FLASH_FLAG_PGERR_BANK2 (FLASH_SR2_PGERR << 16) /*!< FLASH Bank2 Programming error flag */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
543 #define FLASH_FLAG_WRPERR_BANK2 (FLASH_SR2_WRPRTERR << 16) /*!< FLASH Bank2 Write protected error flag */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
544 #define FLASH_FLAG_EOP_BANK2 (FLASH_SR2_EOP << 16) /*!< FLASH Bank2 End of Operation flag */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
545
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
546 #else
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
547
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
548 #define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
549 #define FLASH_FLAG_PGERR FLASH_SR_PGERR /*!< FLASH Programming error flag */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
550 #define FLASH_FLAG_WRPERR FLASH_SR_WRPRTERR /*!< FLASH Write protected error flag */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
551 #define FLASH_FLAG_EOP FLASH_SR_EOP /*!< FLASH End of Operation flag */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
552
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
553 #endif
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
554 #define FLASH_FLAG_OPTVERR ((OBR_REG_INDEX << 8 | FLASH_OBR_OPTERR)) /*!< Option Byte Error */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
555 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
556 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
557 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
558
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
559 /** @defgroup FLASH_Interrupt_definition Interrupt definition
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
560 * @brief FLASH Interrupt definition
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
561 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
562 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
563 #if defined(FLASH_BANK2_END)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
564 #define FLASH_IT_EOP FLASH_IT_EOP_BANK1 /*!< End of FLASH Operation Interrupt source Bank1 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
565 #define FLASH_IT_ERR FLASH_IT_ERR_BANK1 /*!< Error Interrupt source Bank1 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
566
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
567 #define FLASH_IT_EOP_BANK1 FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source Bank1 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
568 #define FLASH_IT_ERR_BANK1 FLASH_CR_ERRIE /*!< Error Interrupt source Bank1 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
569
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
570 #define FLASH_IT_EOP_BANK2 (FLASH_CR2_EOPIE << 16) /*!< End of FLASH Operation Interrupt source Bank2 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
571 #define FLASH_IT_ERR_BANK2 (FLASH_CR2_ERRIE << 16) /*!< Error Interrupt source Bank2 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
572
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
573 #else
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
574
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
575 #define FLASH_IT_EOP FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
576 #define FLASH_IT_ERR FLASH_CR_ERRIE /*!< Error Interrupt source */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
577
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
578 #endif
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
579 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
580 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
581 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
582
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
583 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
584 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
585 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
586
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
587
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
588 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
589 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
590 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
591
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
592 /* Exported macro ------------------------------------------------------------*/
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
593 /** @defgroup FLASHEx_Exported_Macros FLASHEx Exported Macros
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
594 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
595 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
596
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
597 /** @defgroup FLASH_Interrupt Interrupt
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
598 * @brief macros to handle FLASH interrupts
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
599 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
600 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
601
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
602 #if defined(FLASH_BANK2_END)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
603 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
604 * @brief Enable the specified FLASH interrupt.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
605 * @param __INTERRUPT__ FLASH interrupt
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
606 * This parameter can be any combination of the following values:
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
607 * @arg @ref FLASH_IT_EOP_BANK1 End of FLASH Operation Interrupt on bank1
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
608 * @arg @ref FLASH_IT_ERR_BANK1 Error Interrupt on bank1
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
609 * @arg @ref FLASH_IT_EOP_BANK2 End of FLASH Operation Interrupt on bank2
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
610 * @arg @ref FLASH_IT_ERR_BANK2 Error Interrupt on bank2
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
611 * @retval none
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
612 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
613 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) do { \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
614 /* Enable Bank1 IT */ \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
615 SET_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFF)); \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
616 /* Enable Bank2 IT */ \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
617 SET_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16)); \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
618 } while(0)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
619
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
620 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
621 * @brief Disable the specified FLASH interrupt.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
622 * @param __INTERRUPT__ FLASH interrupt
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
623 * This parameter can be any combination of the following values:
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
624 * @arg @ref FLASH_IT_EOP_BANK1 End of FLASH Operation Interrupt on bank1
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
625 * @arg @ref FLASH_IT_ERR_BANK1 Error Interrupt on bank1
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
626 * @arg @ref FLASH_IT_EOP_BANK2 End of FLASH Operation Interrupt on bank2
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
627 * @arg @ref FLASH_IT_ERR_BANK2 Error Interrupt on bank2
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
628 * @retval none
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
629 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
630 #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) do { \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
631 /* Disable Bank1 IT */ \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
632 CLEAR_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFF)); \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
633 /* Disable Bank2 IT */ \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
634 CLEAR_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16)); \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
635 } while(0)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
636
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
637 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
638 * @brief Get the specified FLASH flag status.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
639 * @param __FLAG__ specifies the FLASH flag to check.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
640 * This parameter can be one of the following values:
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
641 * @arg @ref FLASH_FLAG_EOP_BANK1 FLASH End of Operation flag on bank1
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
642 * @arg @ref FLASH_FLAG_WRPERR_BANK1 FLASH Write protected error flag on bank1
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
643 * @arg @ref FLASH_FLAG_PGERR_BANK1 FLASH Programming error flag on bank1
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
644 * @arg @ref FLASH_FLAG_BSY_BANK1 FLASH Busy flag on bank1
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
645 * @arg @ref FLASH_FLAG_EOP_BANK2 FLASH End of Operation flag on bank2
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
646 * @arg @ref FLASH_FLAG_WRPERR_BANK2 FLASH Write protected error flag on bank2
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
647 * @arg @ref FLASH_FLAG_PGERR_BANK2 FLASH Programming error flag on bank2
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
648 * @arg @ref FLASH_FLAG_BSY_BANK2 FLASH Busy flag on bank2
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
649 * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
650 * @retval The new state of __FLAG__ (SET or RESET).
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
651 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
652 #define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) == FLASH_FLAG_OPTVERR) ? \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
653 (FLASH->OBR & FLASH_OBR_OPTERR) : \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
654 ((((__FLAG__) & SR_FLAG_MASK) != RESET)? \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
655 (FLASH->SR & ((__FLAG__) & SR_FLAG_MASK)) : \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
656 (FLASH->SR2 & ((__FLAG__) >> 16))))
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
657
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
658 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
659 * @brief Clear the specified FLASH flag.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
660 * @param __FLAG__ specifies the FLASH flags to clear.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
661 * This parameter can be any combination of the following values:
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
662 * @arg @ref FLASH_FLAG_EOP_BANK1 FLASH End of Operation flag on bank1
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
663 * @arg @ref FLASH_FLAG_WRPERR_BANK1 FLASH Write protected error flag on bank1
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
664 * @arg @ref FLASH_FLAG_PGERR_BANK1 FLASH Programming error flag on bank1
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
665 * @arg @ref FLASH_FLAG_BSY_BANK1 FLASH Busy flag on bank1
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
666 * @arg @ref FLASH_FLAG_EOP_BANK2 FLASH End of Operation flag on bank2
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
667 * @arg @ref FLASH_FLAG_WRPERR_BANK2 FLASH Write protected error flag on bank2
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
668 * @arg @ref FLASH_FLAG_PGERR_BANK2 FLASH Programming error flag on bank2
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
669 * @arg @ref FLASH_FLAG_BSY_BANK2 FLASH Busy flag on bank2
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
670 * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
671 * @retval none
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
672 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
673 #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
674 /* Clear FLASH_FLAG_OPTVERR flag */ \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
675 if ((__FLAG__) == FLASH_FLAG_OPTVERR) \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
676 { \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
677 CLEAR_BIT(FLASH->OBR, FLASH_OBR_OPTERR); \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
678 } \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
679 else { \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
680 /* Clear Flag in Bank1 */ \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
681 if (((__FLAG__) & SR_FLAG_MASK) != RESET) \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
682 { \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
683 FLASH->SR = ((__FLAG__) & SR_FLAG_MASK); \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
684 } \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
685 /* Clear Flag in Bank2 */ \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
686 if (((__FLAG__) >> 16) != RESET) \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
687 { \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
688 FLASH->SR2 = ((__FLAG__) >> 16); \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
689 } \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
690 } \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
691 } while(0)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
692 #else
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
693 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
694 * @brief Enable the specified FLASH interrupt.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
695 * @param __INTERRUPT__ FLASH interrupt
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
696 * This parameter can be any combination of the following values:
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
697 * @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
698 * @arg @ref FLASH_IT_ERR Error Interrupt
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
699 * @retval none
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
700 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
701 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) (FLASH->CR |= (__INTERRUPT__))
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
702
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
703 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
704 * @brief Disable the specified FLASH interrupt.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
705 * @param __INTERRUPT__ FLASH interrupt
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
706 * This parameter can be any combination of the following values:
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
707 * @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
708 * @arg @ref FLASH_IT_ERR Error Interrupt
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
709 * @retval none
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
710 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
711 #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) (FLASH->CR &= ~(__INTERRUPT__))
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
712
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
713 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
714 * @brief Get the specified FLASH flag status.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
715 * @param __FLAG__ specifies the FLASH flag to check.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
716 * This parameter can be one of the following values:
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
717 * @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
718 * @arg @ref FLASH_FLAG_WRPERR FLASH Write protected error flag
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
719 * @arg @ref FLASH_FLAG_PGERR FLASH Programming error flag
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
720 * @arg @ref FLASH_FLAG_BSY FLASH Busy flag
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
721 * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
722 * @retval The new state of __FLAG__ (SET or RESET).
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
723 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
724 #define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) == FLASH_FLAG_OPTVERR) ? \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
725 (FLASH->OBR & FLASH_OBR_OPTERR) : \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
726 (FLASH->SR & (__FLAG__)))
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
727 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
728 * @brief Clear the specified FLASH flag.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
729 * @param __FLAG__ specifies the FLASH flags to clear.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
730 * This parameter can be any combination of the following values:
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
731 * @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
732 * @arg @ref FLASH_FLAG_WRPERR FLASH Write protected error flag
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
733 * @arg @ref FLASH_FLAG_PGERR FLASH Programming error flag
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
734 * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
735 * @retval none
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
736 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
737 #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
738 /* Clear FLASH_FLAG_OPTVERR flag */ \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
739 if ((__FLAG__) == FLASH_FLAG_OPTVERR) \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
740 { \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
741 CLEAR_BIT(FLASH->OBR, FLASH_OBR_OPTERR); \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
742 } \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
743 else { \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
744 /* Clear Flag in Bank1 */ \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
745 FLASH->SR = (__FLAG__); \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
746 } \
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
747 } while(0)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
748
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
749 #endif
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
750
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
751 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
752 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
753 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
754
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
755 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
756 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
757 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
758
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
759 /* Exported functions --------------------------------------------------------*/
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
760 /** @addtogroup FLASHEx_Exported_Functions
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
761 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
762 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
763
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
764 /** @addtogroup FLASHEx_Exported_Functions_Group1
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
765 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
766 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
767 /* IO operation functions *****************************************************/
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
768 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError);
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
769 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
770
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
771 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
772 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
773 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
774
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
775 /** @addtogroup FLASHEx_Exported_Functions_Group2
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
776 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
777 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
778 /* Peripheral Control functions ***********************************************/
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
779 HAL_StatusTypeDef HAL_FLASHEx_OBErase(void);
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
780 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
781 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
782 uint32_t HAL_FLASHEx_OBGetUserData(uint32_t DATAAdress);
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
783 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
784 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
785 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
786
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
787 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
788 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
789 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
790
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
791 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
792 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
793 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
794
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
795 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
796 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
797 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
798 #ifdef __cplusplus
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
799 }
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
800 #endif
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
801
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
802 #endif /* __STM32F1xx_HAL_FLASH_EX_H */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
803
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
804 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/