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1 /**
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2 ******************************************************************************
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3 * @file stm32l4xx_hal_pwr.c
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4 * @author MCD Application Team
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5 * @version V1.6.0
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6 * @date 28-October-2016
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7 * @brief PWR HAL module driver.
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8 * This file provides firmware functions to manage the following
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9 * functionalities of the Power Controller (PWR) peripheral:
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10 * + Initialization/de-initialization functions
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11 * + Peripheral Control functions
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12 *
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13 ******************************************************************************
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14 * @attention
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15 *
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16 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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17 *
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18 * Redistribution and use in source and binary forms, with or without modification,
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19 * are permitted provided that the following conditions are met:
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20 * 1. Redistributions of source code must retain the above copyright notice,
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21 * this list of conditions and the following disclaimer.
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22 * 2. Redistributions in binary form must reproduce the above copyright notice,
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23 * this list of conditions and the following disclaimer in the documentation
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24 * and/or other materials provided with the distribution.
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25 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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26 * may be used to endorse or promote products derived from this software
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27 * without specific prior written permission.
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28 *
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29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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30 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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32 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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36 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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37 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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39 *
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40 ******************************************************************************
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41 */
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42
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43 /* Includes ------------------------------------------------------------------*/
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44 #include "stm32l4xx_hal.h"
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45
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46 /** @addtogroup STM32L4xx_HAL_Driver
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47 * @{
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48 */
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49
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50 /** @defgroup PWR PWR
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51 * @brief PWR HAL module driver
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52 * @{
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53 */
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54
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55 #ifdef HAL_PWR_MODULE_ENABLED
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56
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57 /* Private typedef -----------------------------------------------------------*/
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58 /* Private define ------------------------------------------------------------*/
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59
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60 /** @defgroup PWR_Private_Defines PWR Private Defines
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61 * @{
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62 */
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63
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64 /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask
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65 * @{
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66 */
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67 #define PVD_MODE_IT ((uint32_t)0x00010000) /*!< Mask for interruption yielded by PVD threshold crossing */
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68 #define PVD_MODE_EVT ((uint32_t)0x00020000) /*!< Mask for event yielded by PVD threshold crossing */
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69 #define PVD_RISING_EDGE ((uint32_t)0x00000001) /*!< Mask for rising edge set as PVD trigger */
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70 #define PVD_FALLING_EDGE ((uint32_t)0x00000002) /*!< Mask for falling edge set as PVD trigger */
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71 /**
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72 * @}
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73 */
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74
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75 /**
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76 * @}
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77 */
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78
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79 /* Private macro -------------------------------------------------------------*/
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80 /* Private variables ---------------------------------------------------------*/
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81 /* Private function prototypes -----------------------------------------------*/
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82 /* Exported functions --------------------------------------------------------*/
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83
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84 /** @defgroup PWR_Exported_Functions PWR Exported Functions
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85 * @{
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86 */
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87
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88 /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
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89 * @brief Initialization and de-initialization functions
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90 *
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91 @verbatim
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92 ===============================================================================
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93 ##### Initialization and de-initialization functions #####
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94 ===============================================================================
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95 [..]
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96
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97 @endverbatim
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98 * @{
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99 */
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100
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101 /**
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102 * @brief Deinitialize the HAL PWR peripheral registers to their default reset values.
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103 * @retval None
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104 */
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105 void HAL_PWR_DeInit(void)
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106 {
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107 __HAL_RCC_PWR_FORCE_RESET();
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108 __HAL_RCC_PWR_RELEASE_RESET();
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109 }
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110
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111 /**
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112 * @brief Enable access to the backup domain
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113 * (RTC registers, RTC backup data registers).
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114 * @note After reset, the backup domain is protected against
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115 * possible unwanted write accesses.
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116 * @note RTCSEL that sets the RTC clock source selection is in the RTC back-up domain.
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117 * In order to set or modify the RTC clock, the backup domain access must be
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118 * disabled.
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119 * @note LSEON bit that switches on and off the LSE crystal belongs as well to the
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120 * back-up domain.
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121 * @retval None
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122 */
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123 void HAL_PWR_EnableBkUpAccess(void)
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124 {
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125 SET_BIT(PWR->CR1, PWR_CR1_DBP);
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126 }
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127
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128 /**
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129 * @brief Disable access to the backup domain
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130 * (RTC registers, RTC backup data registers).
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131 * @retval None
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132 */
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133 void HAL_PWR_DisableBkUpAccess(void)
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134 {
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135 CLEAR_BIT(PWR->CR1, PWR_CR1_DBP);
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136 }
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137
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138
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139
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140
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141 /**
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142 * @}
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143 */
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144
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145
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146
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147 /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions
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148 * @brief Low Power modes configuration functions
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149 *
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150 @verbatim
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151
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152 ===============================================================================
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153 ##### Peripheral Control functions #####
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154 ===============================================================================
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155
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156 [..]
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157 *** PVD configuration ***
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158 =========================
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159 [..]
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160 (+) The PVD is used to monitor the VDD power supply by comparing it to a
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161 threshold selected by the PVD Level (PLS[2:0] bits in PWR_CR2 register).
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162
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163 (+) PVDO flag is available to indicate if VDD/VDDA is higher or lower
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164 than the PVD threshold. This event is internally connected to the EXTI
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165 line16 and can generate an interrupt if enabled. This is done through
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166 __HAL_PVD_EXTI_ENABLE_IT() macro.
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167 (+) The PVD is stopped in Standby mode.
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168
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169
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170 *** WakeUp pin configuration ***
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171 ================================
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172 [..]
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173 (+) WakeUp pins are used to wakeup the system from Standby mode or Shutdown mode.
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174 The polarity of these pins can be set to configure event detection on high
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175 level (rising edge) or low level (falling edge).
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176
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177
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178
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179 *** Low Power modes configuration ***
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180 =====================================
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181 [..]
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182 The devices feature 8 low-power modes:
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183 (+) Low-power Run mode: core and peripherals are running, main regulator off, low power regulator on.
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184 (+) Sleep mode: Cortex-M4 core stopped, peripherals kept running, main and low power regulators on.
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185 (+) Low-power Sleep mode: Cortex-M4 core stopped, peripherals kept running, main regulator off, low power regulator on.
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186 (+) Stop 0 mode: all clocks are stopped except LSI and LSE, main and low power regulators on.
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187 (+) Stop 1 mode: all clocks are stopped except LSI and LSE, main regulator off, low power regulator on.
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188 (+) Stop 2 mode: all clocks are stopped except LSI and LSE, main regulator off, low power regulator on, reduced set of waking up IPs compared to Stop 1 mode.
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189 (+) Standby mode with SRAM2: all clocks are stopped except LSI and LSE, SRAM2 content preserved, main regulator off, low power regulator on.
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190 (+) Standby mode without SRAM2: all clocks are stopped except LSI and LSE, main and low power regulators off.
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191 (+) Shutdown mode: all clocks are stopped except LSE, main and low power regulators off.
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192
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193
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194 *** Low-power run mode ***
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195 ==========================
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196 [..]
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197 (+) Entry: (from main run mode)
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198 (++) set LPR bit with HAL_PWREx_EnableLowPowerRunMode() API after having decreased the system clock below 2 MHz.
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199
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200 (+) Exit:
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201 (++) clear LPR bit then wait for REGLP bit to be reset with HAL_PWREx_DisableLowPowerRunMode() API. Only
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202 then can the system clock frequency be increased above 2 MHz.
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203
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204
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205 *** Sleep mode / Low-power sleep mode ***
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206 =========================================
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207 [..]
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208 (+) Entry:
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209 The Sleep mode / Low-power Sleep mode is entered thru HAL_PWR_EnterSLEEPMode() API
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210 in specifying whether or not the regulator is forced to low-power mode and if exit is interrupt or event-triggered.
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211 (++) PWR_MAINREGULATOR_ON: Sleep mode (regulator in main mode).
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212 (++) PWR_LOWPOWERREGULATOR_ON: Low-power sleep (regulator in low power mode).
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213 In the latter case, the system clock frequency must have been decreased below 2 MHz beforehand.
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214 (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
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215 (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
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216
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217 (+) WFI Exit:
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218 (++) Any peripheral interrupt acknowledged by the nested vectored interrupt
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219 controller (NVIC) or any wake-up event.
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220
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221 (+) WFE Exit:
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222 (++) Any wake-up event such as an EXTI line configured in event mode.
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223
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224 [..] When exiting the Low-power sleep mode by issuing an interrupt or a wakeup event,
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225 the MCU is in Low-power Run mode.
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226
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227 *** Stop 0, Stop 1 and Stop 2 modes ***
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228 ===============================
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229 [..]
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230 (+) Entry:
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231 The Stop 0, Stop 1 or Stop 2 modes are entered thru the following API's:
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232 (++) HAL_PWREx_EnterSTOP0Mode() for mode 0 or HAL_PWREx_EnterSTOP1Mode() for mode 1 or for porting reasons HAL_PWR_EnterSTOPMode().
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233 (++) HAL_PWREx_EnterSTOP2Mode() for mode 2.
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234 (+) Regulator setting (applicable to HAL_PWR_EnterSTOPMode() only):
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235 (++) PWR_MAINREGULATOR_ON
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236 (++) PWR_LOWPOWERREGULATOR_ON
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237 (+) Exit (interrupt or event-triggered, specified when entering STOP mode):
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238 (++) PWR_STOPENTRY_WFI: enter Stop mode with WFI instruction
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239 (++) PWR_STOPENTRY_WFE: enter Stop mode with WFE instruction
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240
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241 (+) WFI Exit:
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242 (++) Any EXTI Line (Internal or External) configured in Interrupt mode.
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243 (++) Some specific communication peripherals (USART, LPUART, I2C) interrupts
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244 when programmed in wakeup mode.
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245 (+) WFE Exit:
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246 (++) Any EXTI Line (Internal or External) configured in Event mode.
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247
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248 [..]
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249 When exiting Stop 0 and Stop 1 modes, the MCU is either in Run mode or in Low-power Run mode
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250 depending on the LPR bit setting.
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251 When exiting Stop 2 mode, the MCU is in Run mode.
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252
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253 *** Standby mode ***
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254 ====================
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255 [..]
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256 The Standby mode offers two options:
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257 (+) option a) all clocks off except LSI and LSE, RRS bit set (keeps voltage regulator in low power mode).
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258 SRAM and registers contents are lost except for the SRAM2 content, the RTC registers, RTC backup registers
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259 and Standby circuitry.
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260 (+) option b) all clocks off except LSI and LSE, RRS bit cleared (voltage regulator then disabled).
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261 SRAM and register contents are lost except for the RTC registers, RTC backup registers
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262 and Standby circuitry.
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263
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264 (++) Entry:
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265 (+++) The Standby mode is entered thru HAL_PWR_EnterSTANDBYMode() API.
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266 SRAM1 and register contents are lost except for registers in the Backup domain and
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267 Standby circuitry. SRAM2 content can be preserved if the bit RRS is set in PWR_CR3 register.
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268 To enable this feature, the user can resort to HAL_PWREx_EnableSRAM2ContentRetention() API
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269 to set RRS bit.
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270
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271 (++) Exit:
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272 (+++) WKUP pin rising edge, RTC alarm or wakeup, tamper event, time-stamp event,
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273 external reset in NRST pin, IWDG reset.
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274
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275 [..] After waking up from Standby mode, program execution restarts in the same way as after a Reset.
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276
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277
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278 *** Shutdown mode ***
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279 ======================
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280 [..]
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281 In Shutdown mode,
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282 voltage regulator is disabled, all clocks are off except LSE, RRS bit is cleared.
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283 SRAM and registers contents are lost except for backup domain registers.
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284
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285 (+) Entry:
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286 The Shutdown mode is entered thru HAL_PWREx_EnterSHUTDOWNMode() API.
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287
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288 (+) Exit:
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289 (++) WKUP pin rising edge, RTC alarm or wakeup, tamper event, time-stamp event,
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290 external reset in NRST pin.
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291
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292 [..] After waking up from Shutdown mode, program execution restarts in the same way as after a Reset.
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293
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294
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295 *** Auto-wakeup (AWU) from low-power mode ***
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296 =============================================
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297 [..]
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298 The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
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299 Wakeup event, a tamper event or a time-stamp event, without depending on
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300 an external interrupt (Auto-wakeup mode).
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301
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302 (+) RTC auto-wakeup (AWU) from the Stop, Standby and Shutdown modes
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303
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304
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305 (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to
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306 configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function.
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307
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308 (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
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309 is necessary to configure the RTC to detect the tamper or time stamp event using the
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310 HAL_RTCEx_SetTimeStamp_IT() or HAL_RTCEx_SetTamper_IT() functions.
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311
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312 (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to
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313 configure the RTC to generate the RTC WakeUp event using the HAL_RTCEx_SetWakeUpTimer_IT() function.
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314
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315 @endverbatim
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316 * @{
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317 */
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318
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319
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320
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321 /**
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322 * @brief Configure the voltage threshold detected by the Power Voltage Detector (PVD).
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323 * @param sConfigPVD: pointer to a PWR_PVDTypeDef structure that contains the PVD
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324 * configuration information.
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325 * @note Refer to the electrical characteristics of your device datasheet for
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326 * more details about the voltage thresholds corresponding to each
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327 * detection level.
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328 * @retval None
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329 */
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330 HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
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331 {
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332 /* Check the parameters */
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333 assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
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334 assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
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335
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336 /* Set PLS bits according to PVDLevel value */
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337 MODIFY_REG(PWR->CR2, PWR_CR2_PLS, sConfigPVD->PVDLevel);
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338
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339 /* Clear any previous config. Keep it clear if no event or IT mode is selected */
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340 __HAL_PWR_PVD_EXTI_DISABLE_EVENT();
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341 __HAL_PWR_PVD_EXTI_DISABLE_IT();
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342 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
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343 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();
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344
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345 /* Configure interrupt mode */
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346 if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
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347 {
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348 __HAL_PWR_PVD_EXTI_ENABLE_IT();
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349 }
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350
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351 /* Configure event mode */
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352 if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
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353 {
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354 __HAL_PWR_PVD_EXTI_ENABLE_EVENT();
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355 }
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356
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357 /* Configure the edge */
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358 if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
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359 {
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360 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
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361 }
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362
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363 if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
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364 {
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365 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
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366 }
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367
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368 return HAL_OK;
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369 }
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370
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371
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372 /**
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373 * @brief Enable the Power Voltage Detector (PVD).
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374 * @retval None
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375 */
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376 void HAL_PWR_EnablePVD(void)
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377 {
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378 SET_BIT(PWR->CR2, PWR_CR2_PVDE);
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379 }
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380
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381 /**
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382 * @brief Disable the Power Voltage Detector (PVD).
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383 * @retval None
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384 */
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385 void HAL_PWR_DisablePVD(void)
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386 {
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387 CLEAR_BIT(PWR->CR2, PWR_CR2_PVDE);
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388 }
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389
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390
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391
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392
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393 /**
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394 * @brief Enable the WakeUp PINx functionality.
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395 * @param WakeUpPinPolarity: Specifies which Wake-Up pin to enable.
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396 * This parameter can be one of the following legacy values which set the default polarity
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397 * i.e. detection on high level (rising edge):
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398 * @arg @ref PWR_WAKEUP_PIN1, PWR_WAKEUP_PIN2, PWR_WAKEUP_PIN3, PWR_WAKEUP_PIN4, PWR_WAKEUP_PIN5
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399 *
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400 * or one of the following value where the user can explicitly specify the enabled pin and
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401 * the chosen polarity:
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402 * @arg @ref PWR_WAKEUP_PIN1_HIGH or PWR_WAKEUP_PIN1_LOW
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403 * @arg @ref PWR_WAKEUP_PIN2_HIGH or PWR_WAKEUP_PIN2_LOW
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404 * @arg @ref PWR_WAKEUP_PIN3_HIGH or PWR_WAKEUP_PIN3_LOW
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405 * @arg @ref PWR_WAKEUP_PIN4_HIGH or PWR_WAKEUP_PIN4_LOW
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406 * @arg @ref PWR_WAKEUP_PIN5_HIGH or PWR_WAKEUP_PIN5_LOW
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407 * @note PWR_WAKEUP_PINx and PWR_WAKEUP_PINx_HIGH are equivalent.
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408 * @retval None
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409 */
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410 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity)
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411 {
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412 assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinPolarity));
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413
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414 /* Specifies the Wake-Up pin polarity for the event detection
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415 (rising or falling edge) */
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416 MODIFY_REG(PWR->CR4, (PWR_CR3_EWUP & WakeUpPinPolarity), (WakeUpPinPolarity >> PWR_WUP_POLARITY_SHIFT));
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417
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418 /* Enable wake-up pin */
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419 SET_BIT(PWR->CR3, (PWR_CR3_EWUP & WakeUpPinPolarity));
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420
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421
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422 }
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423
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424 /**
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425 * @brief Disable the WakeUp PINx functionality.
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426 * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable.
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427 * This parameter can be one of the following values:
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428 * @arg @ref PWR_WAKEUP_PIN1, PWR_WAKEUP_PIN2, PWR_WAKEUP_PIN3, PWR_WAKEUP_PIN4, PWR_WAKEUP_PIN5
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429 * @retval None
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430 */
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431 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
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432 {
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433 assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
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434
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435 CLEAR_BIT(PWR->CR3, (PWR_CR3_EWUP & WakeUpPinx));
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436 }
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437
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438
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439 /**
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440 * @brief Enter Sleep or Low-power Sleep mode.
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441 * @note In Sleep/Low-power Sleep mode, all I/O pins keep the same state as in Run mode.
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442 * @param Regulator: Specifies the regulator state in Sleep/Low-power Sleep mode.
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443 * This parameter can be one of the following values:
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444 * @arg @ref PWR_MAINREGULATOR_ON Sleep mode (regulator in main mode)
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445 * @arg @ref PWR_LOWPOWERREGULATOR_ON Low-power Sleep mode (regulator in low-power mode)
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446 * @note Low-power Sleep mode is entered from Low-power Run mode. Therefore, if not yet
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447 * in Low-power Run mode before calling HAL_PWR_EnterSLEEPMode() with Regulator set
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448 * to PWR_LOWPOWERREGULATOR_ON, the user can optionally configure the
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449 * Flash in power-down monde in setting the SLEEP_PD bit in FLASH_ACR register.
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450 * Additionally, the clock frequency must be reduced below 2 MHz.
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451 * Setting SLEEP_PD in FLASH_ACR then appropriately reducing the clock frequency must
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452 * be done before calling HAL_PWR_EnterSLEEPMode() API.
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453 * @note When exiting Low-power Sleep mode, the MCU is in Low-power Run mode. To move in
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454 * Run mode, the user must resort to HAL_PWREx_DisableLowPowerRunMode() API.
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455 * @param SLEEPEntry: Specifies if Sleep mode is entered with WFI or WFE instruction.
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456 * This parameter can be one of the following values:
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457 * @arg @ref PWR_SLEEPENTRY_WFI enter Sleep or Low-power Sleep mode with WFI instruction
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458 * @arg @ref PWR_SLEEPENTRY_WFE enter Sleep or Low-power Sleep mode with WFE instruction
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459 * @note When WFI entry is used, tick interrupt have to be disabled if not desired as
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460 * the interrupt wake up source.
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461 * @retval None
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462 */
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463 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
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464 {
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465 /* Check the parameters */
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466 assert_param(IS_PWR_REGULATOR(Regulator));
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467 assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
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468
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469 /* Set Regulator parameter */
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470 if (Regulator == PWR_MAINREGULATOR_ON)
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471 {
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472 /* If in low-power run mode at this point, exit it */
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473 if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF))
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474 {
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475 HAL_PWREx_DisableLowPowerRunMode();
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476 }
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477 /* Regulator now in main mode. */
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478 }
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479 else
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480 {
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481 /* If in run mode, first move to low-power run mode.
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482 The system clock frequency must be below 2 MHz at this point. */
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483 if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF) == RESET)
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484 {
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485 HAL_PWREx_EnableLowPowerRunMode();
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486 }
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487 }
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488
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489 /* Clear SLEEPDEEP bit of Cortex System Control Register */
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490 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
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491
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492 /* Select SLEEP mode entry -------------------------------------------------*/
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493 if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
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494 {
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495 /* Request Wait For Interrupt */
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496 __WFI();
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497 }
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498 else
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499 {
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500 /* Request Wait For Event */
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501 __SEV();
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502 __WFE();
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503 __WFE();
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504 }
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505
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506 }
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507
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508
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509 /**
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510 * @brief Enter Stop mode
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511 * @note This API is named HAL_PWR_EnterSTOPMode to ensure compatibility with legacy code running
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512 * on devices where only "Stop mode" is mentioned with main or low power regulator ON.
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513 * @note In Stop mode, all I/O pins keep the same state as in Run mode.
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514 * @note All clocks in the VCORE domain are stopped; the PLL, the MSI,
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515 * the HSI and the HSE oscillators are disabled. Some peripherals with the wakeup capability
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516 * (I2Cx, USARTx and LPUART) can switch on the HSI to receive a frame, and switch off the HSI
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517 * after receiving the frame if it is not a wakeup frame. In this case, the HSI clock is propagated
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518 * only to the peripheral requesting it.
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519 * SRAM1, SRAM2 and register contents are preserved.
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520 * The BOR is available.
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521 * The voltage regulator can be configured either in normal (Stop 0) or low-power mode (Stop 1).
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522 * @note When exiting Stop 0 or Stop 1 mode by issuing an interrupt or a wakeup event,
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523 * the HSI RC oscillator is selected as system clock if STOPWUCK bit in RCC_CFGR register
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524 * is set; the MSI oscillator is selected if STOPWUCK is cleared.
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525 * @note When the voltage regulator operates in low power mode (Stop 1), an additional
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526 * startup delay is incurred when waking up.
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527 * By keeping the internal regulator ON during Stop mode (Stop 0), the consumption
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528 * is higher although the startup time is reduced.
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529 * @param Regulator: Specifies the regulator state in Stop mode.
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530 * This parameter can be one of the following values:
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531 * @arg @ref PWR_MAINREGULATOR_ON Stop 0 mode (main regulator ON)
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532 * @arg @ref PWR_LOWPOWERREGULATOR_ON Stop 1 mode (low power regulator ON)
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533 * @param STOPEntry: Specifies Stop 0 or Stop 1 mode is entered with WFI or WFE instruction.
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534 * This parameter can be one of the following values:
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535 * @arg @ref PWR_STOPENTRY_WFI Enter Stop 0 or Stop 1 mode with WFI instruction.
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536 * @arg @ref PWR_STOPENTRY_WFE Enter Stop 0 or Stop 1 mode with WFE instruction.
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537 * @retval None
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538 */
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539 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
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540 {
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541 /* Check the parameters */
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542 assert_param(IS_PWR_REGULATOR(Regulator));
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543
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544 if(Regulator == PWR_LOWPOWERREGULATOR_ON)
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545 {
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546 HAL_PWREx_EnterSTOP1Mode(STOPEntry);
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547 }
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548 else
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549 {
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550 HAL_PWREx_EnterSTOP0Mode(STOPEntry);
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551 }
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552 }
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553
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554 /**
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555 * @brief Enter Standby mode.
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556 * @note In Standby mode, the PLL, the HSI, the MSI and the HSE oscillators are switched
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557 * off. The voltage regulator is disabled, except when SRAM2 content is preserved
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558 * in which case the regulator is in low-power mode.
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559 * SRAM1 and register contents are lost except for registers in the Backup domain and
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560 * Standby circuitry. SRAM2 content can be preserved if the bit RRS is set in PWR_CR3 register.
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561 * To enable this feature, the user can resort to HAL_PWREx_EnableSRAM2ContentRetention() API
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562 * to set RRS bit.
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563 * The BOR is available.
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564 * @note The I/Os can be configured either with a pull-up or pull-down or can be kept in analog state.
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565 * HAL_PWREx_EnableGPIOPullUp() and HAL_PWREx_EnableGPIOPullDown() respectively enable Pull Up and
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566 * Pull Down state, HAL_PWREx_DisableGPIOPullUp() and HAL_PWREx_DisableGPIOPullDown() disable the
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567 * same.
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568 * These states are effective in Standby mode only if APC bit is set through
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569 * HAL_PWREx_EnablePullUpPullDownConfig() API.
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570 * @retval None
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|
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571 */
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572 void HAL_PWR_EnterSTANDBYMode(void)
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573 {
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574 /* Set Stand-by mode */
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575 MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_STANDBY);
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576
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577 /* Set SLEEPDEEP bit of Cortex System Control Register */
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578 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
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579
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580 /* This option is used to ensure that store operations are completed */
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|
581 #if defined ( __CC_ARM)
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|
|
582 __force_stores();
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|
|
583 #endif
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|
584 /* Request Wait For Interrupt */
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|
|
585 __WFI();
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586 }
|
|
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587
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588
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589
|
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590 /**
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|
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591 * @brief Indicate Sleep-On-Exit when returning from Handler mode to Thread mode.
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592 * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor
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593 * re-enters SLEEP mode when an interruption handling is over.
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|
594 * Setting this bit is useful when the processor is expected to run only on
|
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|
595 * interruptions handling.
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|
596 * @retval None
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|
|
597 */
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|
|
598 void HAL_PWR_EnableSleepOnExit(void)
|
|
|
599 {
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|
|
600 /* Set SLEEPONEXIT bit of Cortex System Control Register */
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|
|
601 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
|
|
|
602 }
|
|
|
603
|
|
|
604
|
|
|
605 /**
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|
|
606 * @brief Disable Sleep-On-Exit feature when returning from Handler mode to Thread mode.
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|
|
607 * @note Clear SLEEPONEXIT bit of SCR register. When this bit is set, the processor
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|
608 * re-enters SLEEP mode when an interruption handling is over.
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|
609 * @retval None
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|
|
610 */
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|
|
611 void HAL_PWR_DisableSleepOnExit(void)
|
|
|
612 {
|
|
|
613 /* Clear SLEEPONEXIT bit of Cortex System Control Register */
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|
|
614 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
|
|
|
615 }
|
|
|
616
|
|
|
617
|
|
|
618
|
|
|
619 /**
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|
|
620 * @brief Enable CORTEX M4 SEVONPEND bit.
|
|
|
621 * @note Set SEVONPEND bit of SCR register. When this bit is set, this causes
|
|
|
622 * WFE to wake up when an interrupt moves from inactive to pended.
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|
|
623 * @retval None
|
|
|
624 */
|
|
|
625 void HAL_PWR_EnableSEVOnPend(void)
|
|
|
626 {
|
|
|
627 /* Set SEVONPEND bit of Cortex System Control Register */
|
|
|
628 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
|
|
|
629 }
|
|
|
630
|
|
|
631
|
|
|
632 /**
|
|
|
633 * @brief Disable CORTEX M4 SEVONPEND bit.
|
|
|
634 * @note Clear SEVONPEND bit of SCR register. When this bit is set, this causes
|
|
|
635 * WFE to wake up when an interrupt moves from inactive to pended.
|
|
|
636 * @retval None
|
|
|
637 */
|
|
|
638 void HAL_PWR_DisableSEVOnPend(void)
|
|
|
639 {
|
|
|
640 /* Clear SEVONPEND bit of Cortex System Control Register */
|
|
|
641 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
|
|
|
642 }
|
|
|
643
|
|
|
644
|
|
|
645
|
|
|
646
|
|
|
647
|
|
|
648 /**
|
|
|
649 * @brief PWR PVD interrupt callback
|
|
|
650 * @retval None
|
|
|
651 */
|
|
|
652 __weak void HAL_PWR_PVDCallback(void)
|
|
|
653 {
|
|
|
654 /* NOTE : This function should not be modified; when the callback is needed,
|
|
|
655 the HAL_PWR_PVDCallback can be implemented in the user file
|
|
|
656 */
|
|
|
657 }
|
|
|
658
|
|
|
659 /**
|
|
|
660 * @}
|
|
|
661 */
|
|
|
662
|
|
|
663 /**
|
|
|
664 * @}
|
|
|
665 */
|
|
|
666
|
|
|
667 #endif /* HAL_PWR_MODULE_ENABLED */
|
|
|
668 /**
|
|
|
669 * @}
|
|
|
670 */
|
|
|
671
|
|
|
672 /**
|
|
|
673 * @}
|
|
|
674 */
|
|
|
675
|
|
|
676 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
