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1 /* ----------------------------------------------------------------------
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2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
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3 *
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4 * $Date: 19. March 2015
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5 * $Revision: V.1.4.5
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6 *
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7 * Project: CMSIS DSP Library
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8 * Title: arm_rms_q15.c
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9 *
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10 * Description: Root Mean Square of the elements of a Q15 vector.
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11 *
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12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
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13 *
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14 * Redistribution and use in source and binary forms, with or without
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15 * modification, are permitted provided that the following conditions
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16 * are met:
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17 * - Redistributions of source code must retain the above copyright
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18 * notice, this list of conditions and the following disclaimer.
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19 * - Redistributions in binary form must reproduce the above copyright
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20 * notice, this list of conditions and the following disclaimer in
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21 * the documentation and/or other materials provided with the
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22 * distribution.
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23 * - Neither the name of ARM LIMITED nor the names of its contributors
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24 * may be used to endorse or promote products derived from this
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25 * software without specific prior written permission.
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26 *
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27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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38 * POSSIBILITY OF SUCH DAMAGE.
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39 * ---------------------------------------------------------------------------- */
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40
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41 #include "arm_math.h"
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42
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43 /**
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44 * @addtogroup RMS
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45 * @{
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46 */
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47
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48 /**
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49 * @brief Root Mean Square of the elements of a Q15 vector.
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50 * @param[in] *pSrc points to the input vector
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51 * @param[in] blockSize length of the input vector
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52 * @param[out] *pResult rms value returned here
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53 * @return none.
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54 *
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55 * @details
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56 * <b>Scaling and Overflow Behavior:</b>
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57 *
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58 * \par
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59 * The function is implemented using a 64-bit internal accumulator.
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60 * The input is represented in 1.15 format.
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61 * Intermediate multiplication yields a 2.30 format, and this
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62 * result is added without saturation to a 64-bit accumulator in 34.30 format.
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63 * With 33 guard bits in the accumulator, there is no risk of overflow, and the
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64 * full precision of the intermediate multiplication is preserved.
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65 * Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
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66 * 15 bits, and then saturated to yield a result in 1.15 format.
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67 *
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68 */
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69
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70 void arm_rms_q15(
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71 q15_t * pSrc,
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72 uint32_t blockSize,
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73 q15_t * pResult)
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74 {
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75 q63_t sum = 0; /* accumulator */
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76
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77 #ifndef ARM_MATH_CM0_FAMILY
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78
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79 /* Run the below code for Cortex-M4 and Cortex-M3 */
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80
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81 q31_t in; /* temporary variable to store the input value */
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82 q15_t in1; /* temporary variable to store the input value */
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83 uint32_t blkCnt; /* loop counter */
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84
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85 /* loop Unrolling */
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86 blkCnt = blockSize >> 2u;
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87
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88 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
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89 ** a second loop below computes the remaining 1 to 3 samples. */
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90 while(blkCnt > 0u)
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91 {
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92 /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
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93 /* Compute sum of the squares and then store the results in a temporary variable, sum */
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94 in = *__SIMD32(pSrc)++;
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95 sum = __SMLALD(in, in, sum);
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96 in = *__SIMD32(pSrc)++;
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97 sum = __SMLALD(in, in, sum);
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98
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99 /* Decrement the loop counter */
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100 blkCnt--;
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101 }
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102
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103 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
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104 ** No loop unrolling is used. */
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105 blkCnt = blockSize % 0x4u;
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106
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107 while(blkCnt > 0u)
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108 {
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109 /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
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110 /* Compute sum of the squares and then store the results in a temporary variable, sum */
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111 in1 = *pSrc++;
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112 sum = __SMLALD(in1, in1, sum);
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113
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114 /* Decrement the loop counter */
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115 blkCnt--;
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116 }
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117
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118 /* Truncating and saturating the accumulator to 1.15 format */
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119 /* Store the result in the destination */
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120 arm_sqrt_q15(__SSAT((sum / (q63_t)blockSize) >> 15, 16), pResult);
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121
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122 #else
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123
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124 /* Run the below code for Cortex-M0 */
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125
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126 q15_t in; /* temporary variable to store the input value */
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127 uint32_t blkCnt; /* loop counter */
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128
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129 /* Loop over blockSize number of values */
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130 blkCnt = blockSize;
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131
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132 while(blkCnt > 0u)
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133 {
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134 /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
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135 /* Compute sum of the squares and then store the results in a temporary variable, sum */
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136 in = *pSrc++;
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137 sum += ((q31_t) in * in);
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138
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139 /* Decrement the loop counter */
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140 blkCnt--;
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141 }
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142
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143 /* Truncating and saturating the accumulator to 1.15 format */
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144 /* Store the result in the destination */
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145 arm_sqrt_q15(__SSAT((sum / (q63_t)blockSize) >> 15, 16), pResult);
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146
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147 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
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148
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149 }
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150
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151 /**
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152 * @} end of RMS group
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153 */
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