annotate f103c8/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c @ 6:ca42336826bd default tip

working on clock sources
author cin
date Mon, 23 Jan 2017 02:40:17 +0300
parents 0c59e7a7782a
children
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1 /**
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2 ******************************************************************************
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3 * @file stm32f1xx_hal.c
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4 * @author MCD Application Team
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5 * @version V1.0.4
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6 * @date 29-April-2016
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7 * @brief HAL module driver.
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8 * This is the common part of the HAL initialization
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9 *
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10 @verbatim
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11 ==============================================================================
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12 ##### How to use this driver #####
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13 ==============================================================================
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14 [..]
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15 The common HAL driver contains a set of generic and common APIs that can be
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16 used by the PPP peripheral drivers and the user to start using the HAL.
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17 [..]
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18 The HAL contains two APIs' categories:
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19 (+) Common HAL APIs
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20 (+) Services HAL APIs
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21
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22 @endverbatim
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23 ******************************************************************************
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24 * @attention
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25 *
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26 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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27 *
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28 * Redistribution and use in source and binary forms, with or without modification,
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29 * are permitted provided that the following conditions are met:
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30 * 1. Redistributions of source code must retain the above copyright notice,
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31 * this list of conditions and the following disclaimer.
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32 * 2. Redistributions in binary form must reproduce the above copyright notice,
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33 * this list of conditions and the following disclaimer in the documentation
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34 * and/or other materials provided with the distribution.
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35 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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36 * may be used to endorse or promote products derived from this software
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37 * without specific prior written permission.
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38 *
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39 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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40 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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41 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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42 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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43 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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44 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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45 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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46 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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47 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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48 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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49 *
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50 ******************************************************************************
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51 */
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52
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53 /* Includes ------------------------------------------------------------------*/
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54 #include "stm32f1xx_hal.h"
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55
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56 /** @addtogroup STM32F1xx_HAL_Driver
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57 * @{
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58 */
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59
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60 /** @defgroup HAL HAL
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61 * @brief HAL module driver.
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62 * @{
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63 */
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64
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65 #ifdef HAL_MODULE_ENABLED
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66
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67 /* Private typedef -----------------------------------------------------------*/
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68 /* Private define ------------------------------------------------------------*/
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69
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70 /** @defgroup HAL_Private_Constants HAL Private Constants
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71 * @{
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72 */
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73
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74 /**
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75 * @brief STM32F1xx HAL Driver version number
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76 */
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77 #define __STM32F1xx_HAL_VERSION_MAIN (0x01) /*!< [31:24] main version */
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78 #define __STM32F1xx_HAL_VERSION_SUB1 (0x00) /*!< [23:16] sub1 version */
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79 #define __STM32F1xx_HAL_VERSION_SUB2 (0x04) /*!< [15:8] sub2 version */
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80 #define __STM32F1xx_HAL_VERSION_RC (0x00) /*!< [7:0] release candidate */
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81 #define __STM32F1xx_HAL_VERSION ((__STM32F1xx_HAL_VERSION_MAIN << 24)\
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82 |(__STM32F1xx_HAL_VERSION_SUB1 << 16)\
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83 |(__STM32F1xx_HAL_VERSION_SUB2 << 8 )\
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84 |(__STM32F1xx_HAL_VERSION_RC))
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85
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86 #define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF)
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87
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88 /**
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89 * @}
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90 */
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91
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92 /* Private macro -------------------------------------------------------------*/
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93 /* Private variables ---------------------------------------------------------*/
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94
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95 /** @defgroup HAL_Private_Variables HAL Private Variables
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96 * @{
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97 */
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98
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99 static __IO uint32_t uwTick;
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100
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101 /**
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102 * @}
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103 */
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104
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105 /* Private function prototypes -----------------------------------------------*/
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106 /* Exported functions ---------------------------------------------------------*/
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107
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108 /** @defgroup HAL_Exported_Functions HAL Exported Functions
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109 * @{
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110 */
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111
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112 /** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization Functions
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113 * @brief Initialization and de-initialization functions
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114 *
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115 @verbatim
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116 ===============================================================================
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117 ##### Initialization and de-initialization functions #####
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118 ===============================================================================
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119 [..] This section provides functions allowing to:
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120 (+) Initializes the Flash interface, the NVIC allocation and initial clock
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121 configuration. It initializes the source of time base also when timeout
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122 is needed and the backup domain when enabled.
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123 (+) de-Initializes common part of the HAL.
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124 (+) Configure The time base source to have 1ms time base with a dedicated
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125 Tick interrupt priority.
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126 (++) Systick timer is used by default as source of time base, but user
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127 can eventually implement his proper time base source (a general purpose
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128 timer for example or other time source), keeping in mind that Time base
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129 duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
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130 handled in milliseconds basis.
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131 (++) Time base configuration function (HAL_InitTick ()) is called automatically
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132 at the beginning of the program after reset by HAL_Init() or at any time
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133 when clock is configured, by HAL_RCC_ClockConfig().
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134 (++) Source of time base is configured to generate interrupts at regular
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135 time intervals. Care must be taken if HAL_Delay() is called from a
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136 peripheral ISR process, the Tick interrupt line must have higher priority
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137 (numerically lower) than the peripheral interrupt. Otherwise the caller
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138 ISR process will be blocked.
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139 (++) functions affecting time base configurations are declared as __Weak
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140 to make override possible in case of other implementations in user file.
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141
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142 @endverbatim
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143 * @{
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144 */
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145
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146 /**
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147 * @brief This function configures the Flash prefetch,
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148 * Configures time base source, NVIC and Low level hardware
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149 * @note This function is called at the beginning of program after reset and before
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150 * the clock configuration
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151 * @note The time base configuration is based on MSI clock when exiting from Reset.
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152 * Once done, time base tick start incrementing.
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153 * In the default implementation,Systick is used as source of time base.
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154 * The tick variable is incremented each 1ms in its ISR.
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155 * @retval HAL status
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156 */
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157 HAL_StatusTypeDef HAL_Init(void)
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158 {
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159 /* Configure Flash prefetch */
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160 #if (PREFETCH_ENABLE != 0)
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161 #if defined(STM32F101x6) || defined(STM32F101xB) || defined(STM32F101xE) || defined(STM32F101xG) || \
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162 defined(STM32F102x6) || defined(STM32F102xB) || \
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163 defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
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164 defined(STM32F105xC) || defined(STM32F107xC)
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165
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166 /* Prefetch buffer is not available on value line devices */
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167 __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
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168 #endif
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169 #endif /* PREFETCH_ENABLE */
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170
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171 /* Set Interrupt Group Priority */
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172 HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
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173
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174 /* Use systick as time base source and configure 1ms tick (default clock after Reset is MSI) */
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175 HAL_InitTick(TICK_INT_PRIORITY);
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176
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177 /* Init the low level hardware */
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178 HAL_MspInit();
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179
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180 /* Return function status */
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181 return HAL_OK;
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182 }
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183
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184 /**
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185 * @brief This function de-Initializes common part of the HAL and stops the source
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186 * of time base.
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187 * @note This function is optional.
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188 * @retval HAL status
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189 */
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190 HAL_StatusTypeDef HAL_DeInit(void)
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191 {
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192 /* Reset of all peripherals */
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193 __HAL_RCC_APB1_FORCE_RESET();
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194 __HAL_RCC_APB1_RELEASE_RESET();
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195
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196 __HAL_RCC_APB2_FORCE_RESET();
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197 __HAL_RCC_APB2_RELEASE_RESET();
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198
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199 #if defined(STM32F105xC) || defined(STM32F107xC)
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200 __HAL_RCC_AHB_FORCE_RESET();
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201 __HAL_RCC_AHB_RELEASE_RESET();
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202 #endif
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203
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204 /* De-Init the low level hardware */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
205 HAL_MspDeInit();
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
206
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
207 /* Return function status */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
208 return HAL_OK;
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
209 }
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
210
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
211 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
212 * @brief Initializes the MSP.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
213 * @retval None
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
214 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
215 __weak void HAL_MspInit(void)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
216 {
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
217 /* NOTE : This function Should not be modified, when the callback is needed,
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
218 the HAL_MspInit could be implemented in the user file
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
219 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
220 }
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
221
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
222 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
223 * @brief DeInitializes the MSP.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
224 * @retval None
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
225 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
226 __weak void HAL_MspDeInit(void)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
227 {
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
228 /* NOTE : This function Should not be modified, when the callback is needed,
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
229 the HAL_MspDeInit could be implemented in the user file
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
230 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
231 }
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
232
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
233 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
234 * @brief This function configures the source of the time base.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
235 * The time source is configured to have 1ms time base with a dedicated
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
236 * Tick interrupt priority.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
237 * @note This function is called automatically at the beginning of program after
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
238 * reset by HAL_Init() or at any time when clock is reconfigured by HAL_RCC_ClockConfig().
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
239 * @note In the default implementation, SysTick timer is the source of time base.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
240 * It is used to generate interrupts at regular time intervals.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
241 * Care must be taken if HAL_Delay() is called from a peripheral ISR process,
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
242 * The the SysTick interrupt must have higher priority (numerically lower)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
243 * than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
244 * The function is declared as __Weak to be overwritten in case of other
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
245 * implementation in user file.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
246 * @param TickPriority: Tick interrupt priority.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
247 * @retval HAL status
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
248 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
249 __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
250 {
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
251 /*Configure the SysTick to have interrupt in 1ms time basis*/
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
252 HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
253
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
254 /*Configure the SysTick IRQ priority */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
255 HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority ,0);
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
256
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
257 /* Return function status */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
258 return HAL_OK;
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
259 }
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
260
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
261 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
262 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
263 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
264
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
265 /** @defgroup HAL_Exported_Functions_Group2 HAL Control functions
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
266 * @brief HAL Control functions
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
267 *
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
268 @verbatim
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
269 ===============================================================================
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
270 ##### HAL Control functions #####
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
271 ===============================================================================
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
272 [..] This section provides functions allowing to:
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
273 (+) Provide a tick value in millisecond
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
274 (+) Provide a blocking delay in millisecond
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
275 (+) Suspend the time base source interrupt
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
276 (+) Resume the time base source interrupt
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
277 (+) Get the HAL API driver version
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
278 (+) Get the device identifier
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
279 (+) Get the device revision identifier
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
280 (+) Enable/Disable Debug module during Sleep mode
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
281 (+) Enable/Disable Debug module during STOP mode
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
282 (+) Enable/Disable Debug module during STANDBY mode
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
283
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
284 @endverbatim
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
285 * @{
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
286 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
287
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
288 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
289 * @brief This function is called to increment a global variable "uwTick"
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
290 * used as application time base.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
291 * @note In the default implementation, this variable is incremented each 1ms
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
292 * in Systick ISR.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
293 * @note This function is declared as __weak to be overwritten in case of other
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
294 * implementations in user file.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
295 * @retval None
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
296 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
297 __weak void HAL_IncTick(void)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
298 {
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
299 uwTick++;
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
300 }
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
301
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
302 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
303 * @brief Provides a tick value in millisecond.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
304 * @note This function is declared as __weak to be overwritten in case of other
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
305 * implementations in user file.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
306 * @retval tick value
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
307 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
308 __weak uint32_t HAL_GetTick(void)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
309 {
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
310 return uwTick;
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
311 }
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
312
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
313 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
314 * @brief This function provides accurate delay (in milliseconds) based
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
315 * on variable incremented.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
316 * @note In the default implementation , SysTick timer is the source of time base.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
317 * It is used to generate interrupts at regular time intervals where uwTick
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
318 * is incremented.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
319 * @note ThiS function is declared as __weak to be overwritten in case of other
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
320 * implementations in user file.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
321 * @param Delay: specifies the delay time length, in milliseconds.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
322 * @retval None
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
323 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
324 __weak void HAL_Delay(__IO uint32_t Delay)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
325 {
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
326 uint32_t tickstart = 0;
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
327 tickstart = HAL_GetTick();
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
328 while((HAL_GetTick() - tickstart) < Delay)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
329 {
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
330 }
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
331 }
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
332
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
333 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
334 * @brief Suspend Tick increment.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
335 * @note In the default implementation , SysTick timer is the source of time base. It is
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
336 * used to generate interrupts at regular time intervals. Once HAL_SuspendTick()
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
337 * is called, the the SysTick interrupt will be disabled and so Tick increment
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
338 * is suspended.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
339 * @note This function is declared as __weak to be overwritten in case of other
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
340 * implementations in user file.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
341 * @retval None
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
342 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
343 __weak void HAL_SuspendTick(void)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
344 {
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
345 /* Disable SysTick Interrupt */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
346 CLEAR_BIT(SysTick->CTRL,SysTick_CTRL_TICKINT_Msk);
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
347 }
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
348
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
349 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
350 * @brief Resume Tick increment.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
351 * @note In the default implementation , SysTick timer is the source of time base. It is
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
352 * used to generate interrupts at regular time intervals. Once HAL_ResumeTick()
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
353 * is called, the the SysTick interrupt will be enabled and so Tick increment
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
354 * is resumed.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
355 * @note This function is declared as __weak to be overwritten in case of other
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
356 * implementations in user file.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
357 * @retval None
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
358 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
359 __weak void HAL_ResumeTick(void)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
360 {
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
361 /* Enable SysTick Interrupt */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
362 SET_BIT(SysTick->CTRL,SysTick_CTRL_TICKINT_Msk);
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
363 }
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
364
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
365 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
366 * @brief This method returns the HAL revision
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
367 * @retval version: 0xXYZR (8bits for each decimal, R for RC)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
368 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
369 uint32_t HAL_GetHalVersion(void)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
370 {
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
371 return __STM32F1xx_HAL_VERSION;
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
372 }
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
373
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
374 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
375 * @brief Returns the device revision identifier.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
376 * Note: On devices STM32F10xx8 and STM32F10xxB,
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
377 * STM32F101xC/D/E and STM32F103xC/D/E,
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
378 * STM32F101xF/G and STM32F103xF/G
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
379 * STM32F10xx4 and STM32F10xx6
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
380 * Debug registers DBGMCU_IDCODE and DBGMCU_CR are accessible only in
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
381 * debug mode (not accessible by the user software in normal mode).
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
382 * Refer to errata sheet of these devices for more details.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
383 * @retval Device revision identifier
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
384 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
385 uint32_t HAL_GetREVID(void)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
386 {
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
387 return((DBGMCU->IDCODE) >> POSITION_VAL(DBGMCU_IDCODE_REV_ID));
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
388 }
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
389
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
390 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
391 * @brief Returns the device identifier.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
392 * Note: On devices STM32F10xx8 and STM32F10xxB,
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
393 * STM32F101xC/D/E and STM32F103xC/D/E,
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
394 * STM32F101xF/G and STM32F103xF/G
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
395 * STM32F10xx4 and STM32F10xx6
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
396 * Debug registers DBGMCU_IDCODE and DBGMCU_CR are accessible only in
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
397 * debug mode (not accessible by the user software in normal mode).
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
398 * Refer to errata sheet of these devices for more details.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
399 * @retval Device identifier
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
400 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
401 uint32_t HAL_GetDEVID(void)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
402 {
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
403 return((DBGMCU->IDCODE) & IDCODE_DEVID_MASK);
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
404 }
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
405
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
406 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
407 * @brief Enable the Debug Module during SLEEP mode
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
408 * @retval None
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
409 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
410 void HAL_DBGMCU_EnableDBGSleepMode(void)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
411 {
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
412 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
413 }
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
414
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
415 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
416 * @brief Disable the Debug Module during SLEEP mode
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
417 * Note: On devices STM32F10xx8 and STM32F10xxB,
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
418 * STM32F101xC/D/E and STM32F103xC/D/E,
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
419 * STM32F101xF/G and STM32F103xF/G
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
420 * STM32F10xx4 and STM32F10xx6
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
421 * Debug registers DBGMCU_IDCODE and DBGMCU_CR are accessible only in
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
422 * debug mode (not accessible by the user software in normal mode).
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
423 * Refer to errata sheet of these devices for more details.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
424 * @retval None
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
425 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
426 void HAL_DBGMCU_DisableDBGSleepMode(void)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
427 {
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
428 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
429 }
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
430
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
431 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
432 * @brief Enable the Debug Module during STOP mode
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
433 * Note: On devices STM32F10xx8 and STM32F10xxB,
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
434 * STM32F101xC/D/E and STM32F103xC/D/E,
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
435 * STM32F101xF/G and STM32F103xF/G
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
436 * STM32F10xx4 and STM32F10xx6
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
437 * Debug registers DBGMCU_IDCODE and DBGMCU_CR are accessible only in
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
438 * debug mode (not accessible by the user software in normal mode).
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
439 * Refer to errata sheet of these devices for more details.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
440 * Note: On all STM32F1 devices:
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
441 * If the system tick timer interrupt is enabled during the Stop mode
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
442 * debug (DBG_STOP bit set in the DBGMCU_CR register ), it will wakeup
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
443 * the system from Stop mode.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
444 * Workaround: To debug the Stop mode, disable the system tick timer
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
445 * interrupt.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
446 * Refer to errata sheet of these devices for more details.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
447 * Note: On all STM32F1 devices:
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
448 * If the system tick timer interrupt is enabled during the Stop mode
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
449 * debug (DBG_STOP bit set in the DBGMCU_CR register ), it will wakeup
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
450 * the system from Stop mode.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
451 * Workaround: To debug the Stop mode, disable the system tick timer
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
452 * interrupt.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
453 * Refer to errata sheet of these devices for more details.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
454 * @retval None
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
455 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
456 void HAL_DBGMCU_EnableDBGStopMode(void)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
457 {
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
458 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
459 }
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
460
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
461 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
462 * @brief Disable the Debug Module during STOP mode
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
463 * Note: On devices STM32F10xx8 and STM32F10xxB,
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
464 * STM32F101xC/D/E and STM32F103xC/D/E,
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
465 * STM32F101xF/G and STM32F103xF/G
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
466 * STM32F10xx4 and STM32F10xx6
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
467 * Debug registers DBGMCU_IDCODE and DBGMCU_CR are accessible only in
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
468 * debug mode (not accessible by the user software in normal mode).
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
469 * Refer to errata sheet of these devices for more details.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
470 * @retval None
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
471 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
472 void HAL_DBGMCU_DisableDBGStopMode(void)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
473 {
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
474 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
475 }
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
476
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
477 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
478 * @brief Enable the Debug Module during STANDBY mode
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
479 * Note: On devices STM32F10xx8 and STM32F10xxB,
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
480 * STM32F101xC/D/E and STM32F103xC/D/E,
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
481 * STM32F101xF/G and STM32F103xF/G
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
482 * STM32F10xx4 and STM32F10xx6
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
483 * Debug registers DBGMCU_IDCODE and DBGMCU_CR are accessible only in
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
484 * debug mode (not accessible by the user software in normal mode).
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
485 * Refer to errata sheet of these devices for more details.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
486 * @retval None
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
487 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
488 void HAL_DBGMCU_EnableDBGStandbyMode(void)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
489 {
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
490 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
491 }
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
492
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
493 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
494 * @brief Disable the Debug Module during STANDBY mode
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
495 * Note: On devices STM32F10xx8 and STM32F10xxB,
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
496 * STM32F101xC/D/E and STM32F103xC/D/E,
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
497 * STM32F101xF/G and STM32F103xF/G
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
498 * STM32F10xx4 and STM32F10xx6
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
499 * Debug registers DBGMCU_IDCODE and DBGMCU_CR are accessible only in
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
500 * debug mode (not accessible by the user software in normal mode).
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
501 * Refer to errata sheet of these devices for more details.
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
502 * @retval None
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
503 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
504 void HAL_DBGMCU_DisableDBGStandbyMode(void)
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
505 {
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
506 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
507 }
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
508
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
509 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
510 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
511 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
512
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
513 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
514 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
515 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
516
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
517 #endif /* HAL_MODULE_ENABLED */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
518 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
519 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
520 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
521
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
522 /**
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
523 * @}
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
524 */
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
525
0c59e7a7782a Working on GPIO and RCC
cin
parents:
diff changeset
526 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/