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1 /**
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2 ******************************************************************************
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3 * @file stm32f1xx_hal_dma.c
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4 * @author MCD Application Team
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5 * @version V1.0.4
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6 * @date 29-April-2016
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7 * @brief DMA HAL module driver.
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8 *
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9 * This file provides firmware functions to manage the following
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10 * functionalities of the Direct Memory Access (DMA) peripheral:
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11 * + Initialization and de-initialization functions
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12 * + IO operation functions
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13 * + Peripheral State and errors functions
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14 @verbatim
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15 ==============================================================================
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16 ##### How to use this driver #####
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17 ==============================================================================
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18 [..]
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19 (#) Enable and configure the peripheral to be connected to the DMA Channel
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20 (except for internal SRAM / FLASH memories: no initialization is
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21 necessary) please refer to Reference manual for connection between peripherals
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22 and DMA requests.
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23
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24 (#) For a given Channel, program the required configuration through the following parameters:
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25 Transfer Direction, Source and Destination data formats,
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26 Circular or Normal mode, Channel Priority level, Source and Destination Increment mode,
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27 using HAL_DMA_Init() function.
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28
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29 (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error
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30 detection.
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31
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32 (#) Use HAL_DMA_Abort() function to abort the current transfer
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33
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34 -@- In Memory-to-Memory transfer mode, Circular mode is not allowed.
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35 *** Polling mode IO operation ***
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36 =================================
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37 [..]
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38 (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source
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39 address and destination address and the Length of data to be transferred
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40 (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this
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41 case a fixed Timeout can be configured by User depending from his application.
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42
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43 *** Interrupt mode IO operation ***
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44 ===================================
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45 [..]
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46 (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()
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47 (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ()
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48 (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of
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49 Source address and destination address and the Length of data to be transferred.
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50 In this case the DMA interrupt is configured
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51 (+) Use HAL_DMAy_Channelx_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine
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52 (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can
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53 add his own function by customization of function pointer XferCpltCallback and
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54 XferErrorCallback (i.e a member of DMA handle structure).
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55
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56 *** DMA HAL driver macros list ***
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57 =============================================
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58 [..]
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59 Below the list of most used macros in DMA HAL driver.
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60
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61 (+) __HAL_DMA_ENABLE: Enable the specified DMA Channel.
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62 (+) __HAL_DMA_DISABLE: Disable the specified DMA Channel.
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63 (+) __HAL_DMA_GET_FLAG: Get the DMA Channel pending flags.
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64 (+) __HAL_DMA_CLEAR_FLAG: Clear the DMA Channel pending flags.
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65 (+) __HAL_DMA_ENABLE_IT: Enable the specified DMA Channel interrupts.
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66 (+) __HAL_DMA_DISABLE_IT: Disable the specified DMA Channel interrupts.
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67 (+) __HAL_DMA_GET_IT_SOURCE: Check whether the specified DMA Channel interrupt has occurred or not.
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68
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69 [..]
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70 (@) You can refer to the DMA HAL driver header file for more useful macros
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71
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72 @endverbatim
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73 ******************************************************************************
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74 * @attention
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75 *
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76 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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77 *
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78 * Redistribution and use in source and binary forms, with or without modification,
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79 * are permitted provided that the following conditions are met:
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80 * 1. Redistributions of source code must retain the above copyright notice,
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81 * this list of conditions and the following disclaimer.
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82 * 2. Redistributions in binary form must reproduce the above copyright notice,
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83 * this list of conditions and the following disclaimer in the documentation
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84 * and/or other materials provided with the distribution.
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85 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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86 * may be used to endorse or promote products derived from this software
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87 * without specific prior written permission.
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88 *
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89 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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90 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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91 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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92 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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93 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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94 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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95 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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96 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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97 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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98 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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99 *
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100 ******************************************************************************
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101 */
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102
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103 /* Includes ------------------------------------------------------------------*/
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104 #include "stm32f1xx_hal.h"
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105
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106 /** @addtogroup STM32F1xx_HAL_Driver
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107 * @{
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108 */
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109
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110 /** @defgroup DMA DMA
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111 * @brief DMA HAL module driver
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112 * @{
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113 */
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114
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115 #ifdef HAL_DMA_MODULE_ENABLED
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116
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117 /* Private typedef -----------------------------------------------------------*/
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118 /* Private define ------------------------------------------------------------*/
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119 /** @defgroup DMA_Private_Constants DMA Private Constants
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120 * @{
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121 */
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122 #define HAL_TIMEOUT_DMA_ABORT ((uint32_t)1000) /* 1s */
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123 /**
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124 * @}
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125 */
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126
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127 /* Private macro -------------------------------------------------------------*/
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128 /* Private variables ---------------------------------------------------------*/
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129 /* Private function prototypes -----------------------------------------------*/
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130 /** @defgroup DMA_Private_Functions DMA Private Functions
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131 * @{
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132 */
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133 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
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134 /**
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135 * @}
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136 */
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137
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138 /* Exported functions ---------------------------------------------------------*/
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139
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140 /** @defgroup DMA_Exported_Functions DMA Exported Functions
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141 * @{
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142 */
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143
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144 /** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions
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145 * @brief Initialization and de-initialization functions
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146 *
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147 @verbatim
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148 ===============================================================================
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149 ##### Initialization and de-initialization functions #####
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150 ===============================================================================
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151 [..]
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152 This section provides functions allowing to initialize the DMA Channel source
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153 and destination addresses, incrementation and data sizes, transfer direction,
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154 circular/normal mode selection, memory-to-memory mode selection and Channel priority value.
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155 [..]
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156 The HAL_DMA_Init() function follows the DMA configuration procedures as described in
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157 reference manual.
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158
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159 @endverbatim
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160 * @{
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161 */
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162
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163 /**
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164 * @brief Initializes the DMA according to the specified
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165 * parameters in the DMA_InitTypeDef and create the associated handle.
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166 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
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167 * the configuration information for the specified DMA Channel.
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168 * @retval HAL status
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169 */
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170 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
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171 {
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172 uint32_t tmp = 0;
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173
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174 /* Check the DMA handle allocation */
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175 if(hdma == NULL)
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176 {
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177 return HAL_ERROR;
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178 }
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179
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180 /* Check the parameters */
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181 assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
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182 assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));
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183 assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));
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184 assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));
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185 assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
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186 assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
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187 assert_param(IS_DMA_MODE(hdma->Init.Mode));
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188 assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
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189
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190 if(hdma->State == HAL_DMA_STATE_RESET)
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191 {
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192 /* Allocate lock resource and initialize it */
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193 hdma->Lock = HAL_UNLOCKED;
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194 }
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195
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196 /* Change DMA peripheral state */
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197 hdma->State = HAL_DMA_STATE_BUSY;
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198
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199 /* Get the CR register value */
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200 tmp = hdma->Instance->CCR;
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201
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202 /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */
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203 tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \
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204 DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \
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205 DMA_CCR_DIR));
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206
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207 /* Prepare the DMA Channel configuration */
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208 tmp |= hdma->Init.Direction |
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209 hdma->Init.PeriphInc | hdma->Init.MemInc |
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210 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
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211 hdma->Init.Mode | hdma->Init.Priority;
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212
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213 /* Write to DMA Channel CR register */
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214 hdma->Instance->CCR = tmp;
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215
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216 /* Initialise the error code */
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217 hdma->ErrorCode = HAL_DMA_ERROR_NONE;
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218
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219 /* Initialize the DMA state*/
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220 hdma->State = HAL_DMA_STATE_READY;
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221
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222 return HAL_OK;
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223 }
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224
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225 /**
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226 * @brief DeInitializes the DMA peripheral
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227 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
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228 * the configuration information for the specified DMA Channel.
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229 * @retval HAL status
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230 */
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231 HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
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232 {
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233 /* Check the DMA handle allocation */
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234 if(hdma == NULL)
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235 {
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236 return HAL_ERROR;
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237 }
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238
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239 /* Check the parameters */
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240 assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
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241
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242 /* Check the DMA peripheral state */
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243 if(hdma->State == HAL_DMA_STATE_BUSY)
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244 {
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245 return HAL_ERROR;
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246 }
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247
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248 /* Disable the selected DMA Channelx */
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249 __HAL_DMA_DISABLE(hdma);
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250
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251 /* Reset DMA Channel control register */
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252 hdma->Instance->CCR = 0;
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253
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254 /* Reset DMA Channel Number of Data to Transfer register */
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255 hdma->Instance->CNDTR = 0;
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256
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257 /* Reset DMA Channel peripheral address register */
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258 hdma->Instance->CPAR = 0;
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259
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260 /* Reset DMA Channel memory address register */
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261 hdma->Instance->CMAR = 0;
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262
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263 /* Clear all flags */
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264 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
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265 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
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266 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
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267
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268 /* Initialize the error code */
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269 hdma->ErrorCode = HAL_DMA_ERROR_NONE;
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270
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271 /* Initialize the DMA state */
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272 hdma->State = HAL_DMA_STATE_RESET;
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273
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274 /* Release Lock */
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275 __HAL_UNLOCK(hdma);
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276
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277 return HAL_OK;
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278 }
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279
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280 /**
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281 * @}
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282 */
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283
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284 /** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions
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285 * @brief I/O operation functions
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286 *
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287 @verbatim
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288 ===============================================================================
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289 ##### IO operation functions #####
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290 ===============================================================================
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291 [..] This section provides functions allowing to:
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292 (+) Configure the source, destination address and data length and Start DMA transfer
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293 (+) Configure the source, destination address and data length and
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294 Start DMA transfer with interrupt
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295 (+) Abort DMA transfer
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296 (+) Poll for transfer complete
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297 (+) Handle DMA interrupt request
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298
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299 @endverbatim
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300 * @{
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301 */
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302
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303 /**
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304 * @brief Starts the DMA Transfer.
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305 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
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306 * the configuration information for the specified DMA Channel.
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307 * @param SrcAddress: The source memory Buffer address
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308 * @param DstAddress: The destination memory Buffer address
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309 * @param DataLength: The length of data to be transferred from source to destination
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310 * @retval HAL status
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311 */
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312 HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
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313 {
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314 /* Process locked */
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315 __HAL_LOCK(hdma);
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316
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317 /* Change DMA peripheral state */
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318 hdma->State = HAL_DMA_STATE_BUSY;
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319
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320 /* Check the parameters */
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321 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
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322
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323 /* Disable the peripheral */
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324 __HAL_DMA_DISABLE(hdma);
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325
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326 /* Configure the source, destination address and the data length */
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327 DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
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328
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329 /* Enable the Peripheral */
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330 __HAL_DMA_ENABLE(hdma);
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331
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332 return HAL_OK;
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333 }
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334
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335 /**
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336 * @brief Start the DMA Transfer with interrupt enabled.
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337 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
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338 * the configuration information for the specified DMA Channel.
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339 * @param SrcAddress: The source memory Buffer address
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340 * @param DstAddress: The destination memory Buffer address
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341 * @param DataLength: The length of data to be transferred from source to destination
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342 * @retval HAL status
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343 */
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344 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
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345 {
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346 /* Process locked */
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347 __HAL_LOCK(hdma);
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348
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349 /* Change DMA peripheral state */
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350 hdma->State = HAL_DMA_STATE_BUSY;
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351
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352 /* Check the parameters */
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353 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
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354
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355 /* Disable the peripheral */
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356 __HAL_DMA_DISABLE(hdma);
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357
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358 /* Configure the source, destination address and the data length */
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359 DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
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360
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361 /* Enable the transfer complete interrupt */
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362 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TC);
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363
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364 /* Enable the Half transfer complete interrupt */
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365 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_HT);
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366
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367 /* Enable the transfer Error interrupt */
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368 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TE);
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369
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370 /* Enable the Peripheral */
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371 __HAL_DMA_ENABLE(hdma);
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372
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373 return HAL_OK;
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374 }
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375
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376 /**
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377 * @brief Aborts the DMA Transfer.
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378 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
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379 * the configuration information for the specified DMA Channel.
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380 *
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381 * @note After disabling a DMA Channel, a check for wait until the DMA Channel is
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382 * effectively disabled is added. If a Channel is disabled
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383 * while a data transfer is ongoing, the current data will be transferred
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384 * and the Channel will be effectively disabled only after the transfer of
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385 * this single data is finished.
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386 * @retval HAL status
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387 */
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388 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
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389 {
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390 uint32_t tickstart = 0x00;
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391
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392 /* Disable the channel */
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393 __HAL_DMA_DISABLE(hdma);
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394
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395 /* Get tick */
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396 tickstart = HAL_GetTick();
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397
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398 /* Check if the DMA Channel is effectively disabled */
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399 while((hdma->Instance->CCR & DMA_CCR_EN) != 0)
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400 {
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401 /* Check for the Timeout */
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402 if((HAL_GetTick() - tickstart) > HAL_TIMEOUT_DMA_ABORT)
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403 {
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404 /* Update error code */
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405 SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TIMEOUT);
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406
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407 /* Change the DMA state */
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408 hdma->State = HAL_DMA_STATE_TIMEOUT;
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409
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|
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410 /* Process Unlocked */
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411 __HAL_UNLOCK(hdma);
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412
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413 return HAL_TIMEOUT;
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414 }
|
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415 }
|
|
|
416 /* Change the DMA state */
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417 hdma->State = HAL_DMA_STATE_READY;
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|
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418
|
|
|
419 /* Process Unlocked */
|
|
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420 __HAL_UNLOCK(hdma);
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421
|
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422 return HAL_OK;
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|
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423 }
|
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424
|
|
|
425 /**
|
|
|
426 * @brief Polling for transfer complete.
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|
|
427 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
|
|
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428 * the configuration information for the specified DMA Channel.
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|
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429 * @param CompleteLevel: Specifies the DMA level complete.
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430 * @param Timeout: Timeout duration.
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431 * @retval HAL status
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|
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432 */
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|
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433 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout)
|
|
|
434 {
|
|
|
435 uint32_t temp;
|
|
|
436 uint32_t tickstart = 0x00;
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|
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437
|
|
|
438 /* Get the level transfer complete flag */
|
|
|
439 if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
|
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440 {
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|
441 /* Transfer Complete flag */
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442 temp = __HAL_DMA_GET_TC_FLAG_INDEX(hdma);
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443 }
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|
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444 else
|
|
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445 {
|
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446 /* Half Transfer Complete flag */
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|
447 temp = __HAL_DMA_GET_HT_FLAG_INDEX(hdma);
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448 }
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|
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449
|
|
|
450 /* Get tick */
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451 tickstart = HAL_GetTick();
|
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452
|
|
|
453 while(__HAL_DMA_GET_FLAG(hdma, temp) == RESET)
|
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454 {
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455 if((__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET))
|
|
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456 {
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|
|
457 /* Clear the transfer error flags */
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458 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
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|
459
|
|
|
460 /* Update error code */
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|
|
461 SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TE);
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|
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462
|
|
|
463 /* Change the DMA state */
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|
464 hdma->State= HAL_DMA_STATE_ERROR;
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465
|
|
|
466 /* Process Unlocked */
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467 __HAL_UNLOCK(hdma);
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468
|
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|
469 return HAL_ERROR;
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|
|
470 }
|
|
|
471 /* Check for the Timeout */
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|
|
472 if(Timeout != HAL_MAX_DELAY)
|
|
|
473 {
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|
|
474 if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
|
|
|
475 {
|
|
|
476 /* Update error code */
|
|
|
477 SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TIMEOUT);
|
|
|
478
|
|
|
479 /* Change the DMA state */
|
|
|
480 hdma->State = HAL_DMA_STATE_TIMEOUT;
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|
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481
|
|
|
482 /* Process Unlocked */
|
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|
483 __HAL_UNLOCK(hdma);
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484
|
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|
485 return HAL_TIMEOUT;
|
|
|
486 }
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|
|
487 }
|
|
|
488 }
|
|
|
489
|
|
|
490 if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
|
|
|
491 {
|
|
|
492 /* Clear the transfer complete flag */
|
|
|
493 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
|
|
|
494
|
|
|
495 /* The selected Channelx EN bit is cleared (DMA is disabled and
|
|
|
496 all transfers are complete) */
|
|
|
497 hdma->State = HAL_DMA_STATE_READY;
|
|
|
498
|
|
|
499 }
|
|
|
500 else
|
|
|
501 {
|
|
|
502 /* Clear the half transfer complete flag */
|
|
|
503 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
|
|
|
504
|
|
|
505 /* The selected Channelx EN bit is cleared (DMA is disabled and
|
|
|
506 all transfers of half buffer are complete) */
|
|
|
507 hdma->State = HAL_DMA_STATE_READY_HALF;
|
|
|
508 }
|
|
|
509
|
|
|
510 /* Process unlocked */
|
|
|
511 __HAL_UNLOCK(hdma);
|
|
|
512
|
|
|
513 return HAL_OK;
|
|
|
514 }
|
|
|
515
|
|
|
516 /**
|
|
|
517 * @brief Handles DMA interrupt request.
|
|
|
518 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
|
|
|
519 * the configuration information for the specified DMA Channel.
|
|
|
520 * @retval None
|
|
|
521 */
|
|
|
522 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
|
|
|
523 {
|
|
|
524 /* Transfer Error Interrupt management ***************************************/
|
|
|
525 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET)
|
|
|
526 {
|
|
|
527 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != RESET)
|
|
|
528 {
|
|
|
529 /* Disable the transfer error interrupt */
|
|
|
530 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE);
|
|
|
531
|
|
|
532 /* Clear the transfer error flag */
|
|
|
533 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
|
|
|
534
|
|
|
535 /* Update error code */
|
|
|
536 SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TE);
|
|
|
537
|
|
|
538 /* Change the DMA state */
|
|
|
539 hdma->State = HAL_DMA_STATE_ERROR;
|
|
|
540
|
|
|
541 /* Process Unlocked */
|
|
|
542 __HAL_UNLOCK(hdma);
|
|
|
543
|
|
|
544 if (hdma->XferErrorCallback != NULL)
|
|
|
545 {
|
|
|
546 /* Transfer error callback */
|
|
|
547 hdma->XferErrorCallback(hdma);
|
|
|
548 }
|
|
|
549 }
|
|
|
550 }
|
|
|
551
|
|
|
552 /* Half Transfer Complete Interrupt management ******************************/
|
|
|
553 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)) != RESET)
|
|
|
554 {
|
|
|
555 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != RESET)
|
|
|
556 {
|
|
|
557 /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
|
|
|
558 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
|
|
|
559 {
|
|
|
560 /* Disable the half transfer interrupt */
|
|
|
561 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
|
|
|
562 }
|
|
|
563 /* Clear the half transfer complete flag */
|
|
|
564 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
|
|
|
565
|
|
|
566 /* Change DMA peripheral state */
|
|
|
567 hdma->State = HAL_DMA_STATE_READY_HALF;
|
|
|
568
|
|
|
569 if(hdma->XferHalfCpltCallback != NULL)
|
|
|
570 {
|
|
|
571 /* Half transfer callback */
|
|
|
572 hdma->XferHalfCpltCallback(hdma);
|
|
|
573 }
|
|
|
574 }
|
|
|
575 }
|
|
|
576
|
|
|
577 /* Transfer Complete Interrupt management ***********************************/
|
|
|
578 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)) != RESET)
|
|
|
579 {
|
|
|
580 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != RESET)
|
|
|
581 {
|
|
|
582 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
|
|
|
583 {
|
|
|
584 /* Disable the transfer complete interrupt */
|
|
|
585 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TC);
|
|
|
586 }
|
|
|
587 /* Clear the transfer complete flag */
|
|
|
588 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
|
|
|
589
|
|
|
590 /* Update error code */
|
|
|
591 SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_NONE);
|
|
|
592
|
|
|
593 /* Change the DMA state */
|
|
|
594 hdma->State = HAL_DMA_STATE_READY;
|
|
|
595
|
|
|
596 /* Process Unlocked */
|
|
|
597 __HAL_UNLOCK(hdma);
|
|
|
598
|
|
|
599 if(hdma->XferCpltCallback != NULL)
|
|
|
600 {
|
|
|
601 /* Transfer complete callback */
|
|
|
602 hdma->XferCpltCallback(hdma);
|
|
|
603 }
|
|
|
604 }
|
|
|
605 }
|
|
|
606 }
|
|
|
607
|
|
|
608 /**
|
|
|
609 * @}
|
|
|
610 */
|
|
|
611
|
|
|
612 /** @defgroup DMA_Exported_Functions_Group3 Peripheral State functions
|
|
|
613 * @brief Peripheral State functions
|
|
|
614 *
|
|
|
615 @verbatim
|
|
|
616 ===============================================================================
|
|
|
617 ##### State and Errors functions #####
|
|
|
618 ===============================================================================
|
|
|
619 [..]
|
|
|
620 This subsection provides functions allowing to
|
|
|
621 (+) Check the DMA state
|
|
|
622 (+) Get error code
|
|
|
623
|
|
|
624 @endverbatim
|
|
|
625 * @{
|
|
|
626 */
|
|
|
627
|
|
|
628 /**
|
|
|
629 * @brief Returns the DMA state.
|
|
|
630 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
|
|
|
631 * the configuration information for the specified DMA Channel.
|
|
|
632 * @retval HAL state
|
|
|
633 */
|
|
|
634 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
|
|
|
635 {
|
|
|
636 return hdma->State;
|
|
|
637 }
|
|
|
638
|
|
|
639 /**
|
|
|
640 * @brief Return the DMA error code
|
|
|
641 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
|
|
|
642 * the configuration information for the specified DMA Channel.
|
|
|
643 * @retval DMA Error Code
|
|
|
644 */
|
|
|
645 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
|
|
|
646 {
|
|
|
647 return hdma->ErrorCode;
|
|
|
648 }
|
|
|
649
|
|
|
650 /**
|
|
|
651 * @}
|
|
|
652 */
|
|
|
653
|
|
|
654 /**
|
|
|
655 * @}
|
|
|
656 */
|
|
|
657
|
|
|
658 /** @addtogroup DMA_Private_Functions DMA Private Functions
|
|
|
659 * @{
|
|
|
660 */
|
|
|
661
|
|
|
662 /**
|
|
|
663 * @brief Sets the DMA Transfer parameter.
|
|
|
664 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
|
|
|
665 * the configuration information for the specified DMA Channel.
|
|
|
666 * @param SrcAddress: The source memory Buffer address
|
|
|
667 * @param DstAddress: The destination memory Buffer address
|
|
|
668 * @param DataLength: The length of data to be transferred from source to destination
|
|
|
669 * @retval HAL status
|
|
|
670 */
|
|
|
671 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
|
|
|
672 {
|
|
|
673 /* Configure DMA Channel data length */
|
|
|
674 hdma->Instance->CNDTR = DataLength;
|
|
|
675
|
|
|
676 /* Peripheral to Memory */
|
|
|
677 if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
|
|
|
678 {
|
|
|
679 /* Configure DMA Channel destination address */
|
|
|
680 hdma->Instance->CPAR = DstAddress;
|
|
|
681
|
|
|
682 /* Configure DMA Channel source address */
|
|
|
683 hdma->Instance->CMAR = SrcAddress;
|
|
|
684 }
|
|
|
685 /* Memory to Peripheral */
|
|
|
686 else
|
|
|
687 {
|
|
|
688 /* Configure DMA Channel source address */
|
|
|
689 hdma->Instance->CPAR = SrcAddress;
|
|
|
690
|
|
|
691 /* Configure DMA Channel destination address */
|
|
|
692 hdma->Instance->CMAR = DstAddress;
|
|
|
693 }
|
|
|
694 }
|
|
|
695
|
|
|
696 /**
|
|
|
697 * @}
|
|
|
698 */
|
|
|
699
|
|
|
700 #endif /* HAL_DMA_MODULE_ENABLED */
|
|
|
701 /**
|
|
|
702 * @}
|
|
|
703 */
|
|
|
704
|
|
|
705 /**
|
|
|
706 * @}
|
|
|
707 */
|
|
|
708
|
|
|
709 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
