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comparison f103c8/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c @ 2:0c59e7a7782a

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Working on GPIO and RCC
author cin
date Mon, 16 Jan 2017 11:04:47 +0300
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1:a0b14b11ad9f 2:0c59e7a7782a
1 /* ----------------------------------------------------------------------
2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 *
4 * $Date: 19. March 2015
5 * $Revision: V.1.4.5
6 *
7 * Project: CMSIS DSP Library
8 * Title: arm_add_q15.c
9 *
10 * Description: Q15 vector addition
11 *
12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * - Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * - Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the
22 * distribution.
23 * - Neither the name of ARM LIMITED nor the names of its contributors
24 * may be used to endorse or promote products derived from this
25 * software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 * -------------------------------------------------------------------- */
40
41 #include "arm_math.h"
42
43 /**
44 * @ingroup groupMath
45 */
46
47 /**
48 * @addtogroup BasicAdd
49 * @{
50 */
51
52 /**
53 * @brief Q15 vector addition.
54 * @param[in] *pSrcA points to the first input vector
55 * @param[in] *pSrcB points to the second input vector
56 * @param[out] *pDst points to the output vector
57 * @param[in] blockSize number of samples in each vector
58 * @return none.
59 *
60 * <b>Scaling and Overflow Behavior:</b>
61 * \par
62 * The function uses saturating arithmetic.
63 * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
64 */
65
66 void arm_add_q15(
67 q15_t * pSrcA,
68 q15_t * pSrcB,
69 q15_t * pDst,
70 uint32_t blockSize)
71 {
72 uint32_t blkCnt; /* loop counter */
73
74 #ifndef ARM_MATH_CM0_FAMILY
75
76 /* Run the below code for Cortex-M4 and Cortex-M3 */
77 q31_t inA1, inA2, inB1, inB2;
78
79 /*loop Unrolling */
80 blkCnt = blockSize >> 2u;
81
82 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
83 ** a second loop below computes the remaining 1 to 3 samples. */
84 while(blkCnt > 0u)
85 {
86 /* C = A + B */
87 /* Add and then store the results in the destination buffer. */
88 inA1 = *__SIMD32(pSrcA)++;
89 inA2 = *__SIMD32(pSrcA)++;
90 inB1 = *__SIMD32(pSrcB)++;
91 inB2 = *__SIMD32(pSrcB)++;
92
93 *__SIMD32(pDst)++ = __QADD16(inA1, inB1);
94 *__SIMD32(pDst)++ = __QADD16(inA2, inB2);
95
96 /* Decrement the loop counter */
97 blkCnt--;
98 }
99
100 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
101 ** No loop unrolling is used. */
102 blkCnt = blockSize % 0x4u;
103
104 while(blkCnt > 0u)
105 {
106 /* C = A + B */
107 /* Add and then store the results in the destination buffer. */
108 *pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++);
109
110 /* Decrement the loop counter */
111 blkCnt--;
112 }
113
114 #else
115
116 /* Run the below code for Cortex-M0 */
117
118
119
120 /* Initialize blkCnt with number of samples */
121 blkCnt = blockSize;
122
123 while(blkCnt > 0u)
124 {
125 /* C = A + B */
126 /* Add and then store the results in the destination buffer. */
127 *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ + *pSrcB++), 16);
128
129 /* Decrement the loop counter */
130 blkCnt--;
131 }
132
133 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
134
135
136 }
137
138 /**
139 * @} end of BasicAdd group
140 */