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comparison f103c8/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q15.c @ 2:0c59e7a7782a
Working on GPIO and RCC
| author | cin |
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| date | Mon, 16 Jan 2017 11:04:47 +0300 |
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| 1:a0b14b11ad9f | 2:0c59e7a7782a |
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| 1 /* ---------------------------------------------------------------------- | |
| 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved. | |
| 3 * | |
| 4 * $Date: 19. March 2015 | |
| 5 * $Revision: V.1.4.5 | |
| 6 * | |
| 7 * Project: CMSIS DSP Library | |
| 8 * Title: arm_rms_q15.c | |
| 9 * | |
| 10 * Description: Root Mean Square of the elements of a Q15 vector. | |
| 11 * | |
| 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 | |
| 13 * | |
| 14 * Redistribution and use in source and binary forms, with or without | |
| 15 * modification, are permitted provided that the following conditions | |
| 16 * are met: | |
| 17 * - Redistributions of source code must retain the above copyright | |
| 18 * notice, this list of conditions and the following disclaimer. | |
| 19 * - Redistributions in binary form must reproduce the above copyright | |
| 20 * notice, this list of conditions and the following disclaimer in | |
| 21 * the documentation and/or other materials provided with the | |
| 22 * distribution. | |
| 23 * - Neither the name of ARM LIMITED nor the names of its contributors | |
| 24 * may be used to endorse or promote products derived from this | |
| 25 * software without specific prior written permission. | |
| 26 * | |
| 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
| 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
| 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS | |
| 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE | |
| 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, | |
| 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | |
| 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | |
| 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
| 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
| 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN | |
| 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
| 38 * POSSIBILITY OF SUCH DAMAGE. | |
| 39 * ---------------------------------------------------------------------------- */ | |
| 40 | |
| 41 #include "arm_math.h" | |
| 42 | |
| 43 /** | |
| 44 * @addtogroup RMS | |
| 45 * @{ | |
| 46 */ | |
| 47 | |
| 48 /** | |
| 49 * @brief Root Mean Square of the elements of a Q15 vector. | |
| 50 * @param[in] *pSrc points to the input vector | |
| 51 * @param[in] blockSize length of the input vector | |
| 52 * @param[out] *pResult rms value returned here | |
| 53 * @return none. | |
| 54 * | |
| 55 * @details | |
| 56 * <b>Scaling and Overflow Behavior:</b> | |
| 57 * | |
| 58 * \par | |
| 59 * The function is implemented using a 64-bit internal accumulator. | |
| 60 * The input is represented in 1.15 format. | |
| 61 * Intermediate multiplication yields a 2.30 format, and this | |
| 62 * result is added without saturation to a 64-bit accumulator in 34.30 format. | |
| 63 * With 33 guard bits in the accumulator, there is no risk of overflow, and the | |
| 64 * full precision of the intermediate multiplication is preserved. | |
| 65 * Finally, the 34.30 result is truncated to 34.15 format by discarding the lower | |
| 66 * 15 bits, and then saturated to yield a result in 1.15 format. | |
| 67 * | |
| 68 */ | |
| 69 | |
| 70 void arm_rms_q15( | |
| 71 q15_t * pSrc, | |
| 72 uint32_t blockSize, | |
| 73 q15_t * pResult) | |
| 74 { | |
| 75 q63_t sum = 0; /* accumulator */ | |
| 76 | |
| 77 #ifndef ARM_MATH_CM0_FAMILY | |
| 78 | |
| 79 /* Run the below code for Cortex-M4 and Cortex-M3 */ | |
| 80 | |
| 81 q31_t in; /* temporary variable to store the input value */ | |
| 82 q15_t in1; /* temporary variable to store the input value */ | |
| 83 uint32_t blkCnt; /* loop counter */ | |
| 84 | |
| 85 /* loop Unrolling */ | |
| 86 blkCnt = blockSize >> 2u; | |
| 87 | |
| 88 /* First part of the processing with loop unrolling. Compute 4 outputs at a time. | |
| 89 ** a second loop below computes the remaining 1 to 3 samples. */ | |
| 90 while(blkCnt > 0u) | |
| 91 { | |
| 92 /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ | |
| 93 /* Compute sum of the squares and then store the results in a temporary variable, sum */ | |
| 94 in = *__SIMD32(pSrc)++; | |
| 95 sum = __SMLALD(in, in, sum); | |
| 96 in = *__SIMD32(pSrc)++; | |
| 97 sum = __SMLALD(in, in, sum); | |
| 98 | |
| 99 /* Decrement the loop counter */ | |
| 100 blkCnt--; | |
| 101 } | |
| 102 | |
| 103 /* If the blockSize is not a multiple of 4, compute any remaining output samples here. | |
| 104 ** No loop unrolling is used. */ | |
| 105 blkCnt = blockSize % 0x4u; | |
| 106 | |
| 107 while(blkCnt > 0u) | |
| 108 { | |
| 109 /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ | |
| 110 /* Compute sum of the squares and then store the results in a temporary variable, sum */ | |
| 111 in1 = *pSrc++; | |
| 112 sum = __SMLALD(in1, in1, sum); | |
| 113 | |
| 114 /* Decrement the loop counter */ | |
| 115 blkCnt--; | |
| 116 } | |
| 117 | |
| 118 /* Truncating and saturating the accumulator to 1.15 format */ | |
| 119 /* Store the result in the destination */ | |
| 120 arm_sqrt_q15(__SSAT((sum / (q63_t)blockSize) >> 15, 16), pResult); | |
| 121 | |
| 122 #else | |
| 123 | |
| 124 /* Run the below code for Cortex-M0 */ | |
| 125 | |
| 126 q15_t in; /* temporary variable to store the input value */ | |
| 127 uint32_t blkCnt; /* loop counter */ | |
| 128 | |
| 129 /* Loop over blockSize number of values */ | |
| 130 blkCnt = blockSize; | |
| 131 | |
| 132 while(blkCnt > 0u) | |
| 133 { | |
| 134 /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ | |
| 135 /* Compute sum of the squares and then store the results in a temporary variable, sum */ | |
| 136 in = *pSrc++; | |
| 137 sum += ((q31_t) in * in); | |
| 138 | |
| 139 /* Decrement the loop counter */ | |
| 140 blkCnt--; | |
| 141 } | |
| 142 | |
| 143 /* Truncating and saturating the accumulator to 1.15 format */ | |
| 144 /* Store the result in the destination */ | |
| 145 arm_sqrt_q15(__SSAT((sum / (q63_t)blockSize) >> 15, 16), pResult); | |
| 146 | |
| 147 #endif /* #ifndef ARM_MATH_CM0_FAMILY */ | |
| 148 | |
| 149 } | |
| 150 | |
| 151 /** | |
| 152 * @} end of RMS group | |
| 153 */ |
