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comparison f103c8/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h @ 2:0c59e7a7782a

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Working on GPIO and RCC
author cin
date Mon, 16 Jan 2017 11:04:47 +0300
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1:a0b14b11ad9f 2:0c59e7a7782a
1 /**
2 ******************************************************************************
3 * @file stm32f1xx_hal.h
4 * @author MCD Application Team
5 * @version V1.0.4
6 * @date 29-April-2016
7 * @brief This file contains all the functions prototypes for the HAL
8 * module driver.
9 ******************************************************************************
10 * @attention
11 *
12 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
13 *
14 * Redistribution and use in source and binary forms, with or without modification,
15 * are permitted provided that the following conditions are met:
16 * 1. Redistributions of source code must retain the above copyright notice,
17 * this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright notice,
19 * this list of conditions and the following disclaimer in the documentation
20 * and/or other materials provided with the distribution.
21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 *
36 ******************************************************************************
37 */
38
39 /* Define to prevent recursive inclusion -------------------------------------*/
40 #ifndef __STM32F1xx_HAL_H
41 #define __STM32F1xx_HAL_H
42
43 #ifdef __cplusplus
44 extern "C" {
45 #endif
46
47 /* Includes ------------------------------------------------------------------*/
48 #include "stm32f1xx_hal_conf.h"
49
50 /** @addtogroup STM32F1xx_HAL_Driver
51 * @{
52 */
53
54 /** @addtogroup HAL
55 * @{
56 */
57
58 /* Exported types ------------------------------------------------------------*/
59 /* Exported constants --------------------------------------------------------*/
60
61 /* Exported macro ------------------------------------------------------------*/
62
63 /** @defgroup HAL_Exported_Macros HAL Exported Macros
64 * @{
65 */
66
67 /** @defgroup DBGMCU_Freeze_Unfreeze Freeze Unfreeze Peripherals in Debug mode
68 * @brief Freeze/Unfreeze Peripherals in Debug mode
69 * Note: On devices STM32F10xx8 and STM32F10xxB,
70 * STM32F101xC/D/E and STM32F103xC/D/E,
71 * STM32F101xF/G and STM32F103xF/G
72 * STM32F10xx4 and STM32F10xx6
73 * Debug registers DBGMCU_IDCODE and DBGMCU_CR are accessible only in
74 * debug mode (not accessible by the user software in normal mode).
75 * Refer to errata sheet of these devices for more details.
76 * @{
77 */
78
79 /* Peripherals on APB1 */
80 /**
81 * @brief TIM2 Peripherals Debug mode
82 */
83 #define __HAL_DBGMCU_FREEZE_TIM2() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP)
84 #define __HAL_DBGMCU_UNFREEZE_TIM2() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP)
85
86 /**
87 * @brief TIM3 Peripherals Debug mode
88 */
89 #define __HAL_DBGMCU_FREEZE_TIM3() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP)
90 #define __HAL_DBGMCU_UNFREEZE_TIM3() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP)
91
92 #if defined (DBGMCU_CR_DBG_TIM4_STOP)
93 /**
94 * @brief TIM4 Peripherals Debug mode
95 */
96 #define __HAL_DBGMCU_FREEZE_TIM4() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP)
97 #define __HAL_DBGMCU_UNFREEZE_TIM4() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP)
98 #endif
99
100 #if defined (DBGMCU_CR_DBG_TIM5_STOP)
101 /**
102 * @brief TIM5 Peripherals Debug mode
103 */
104 #define __HAL_DBGMCU_FREEZE_TIM5() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP)
105 #define __HAL_DBGMCU_UNFREEZE_TIM5() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP)
106 #endif
107
108 #if defined (DBGMCU_CR_DBG_TIM6_STOP)
109 /**
110 * @brief TIM6 Peripherals Debug mode
111 */
112 #define __HAL_DBGMCU_FREEZE_TIM6() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP)
113 #define __HAL_DBGMCU_UNFREEZE_TIM6() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP)
114 #endif
115
116 #if defined (DBGMCU_CR_DBG_TIM7_STOP)
117 /**
118 * @brief TIM7 Peripherals Debug mode
119 */
120 #define __HAL_DBGMCU_FREEZE_TIM7() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM7_STOP)
121 #define __HAL_DBGMCU_UNFREEZE_TIM7() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM7_STOP)
122 #endif
123
124 #if defined (DBGMCU_CR_DBG_TIM12_STOP)
125 /**
126 * @brief TIM12 Peripherals Debug mode
127 */
128 #define __HAL_DBGMCU_FREEZE_TIM12() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM12_STOP)
129 #define __HAL_DBGMCU_UNFREEZE_TIM12() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM12_STOP)
130 #endif
131
132 #if defined (DBGMCU_CR_DBG_TIM13_STOP)
133 /**
134 * @brief TIM13 Peripherals Debug mode
135 */
136 #define __HAL_DBGMCU_FREEZE_TIM13() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM13_STOP)
137 #define __HAL_DBGMCU_UNFREEZE_TIM13() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM13_STOP)
138 #endif
139
140 #if defined (DBGMCU_CR_DBG_TIM14_STOP)
141 /**
142 * @brief TIM14 Peripherals Debug mode
143 */
144 #define __HAL_DBGMCU_FREEZE_TIM14() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM14_STOP)
145 #define __HAL_DBGMCU_UNFREEZE_TIM14() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM14_STOP)
146 #endif
147
148 /**
149 * @brief WWDG Peripherals Debug mode
150 */
151 #define __HAL_DBGMCU_FREEZE_WWDG() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_WWDG_STOP)
152 #define __HAL_DBGMCU_UNFREEZE_WWDG() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_WWDG_STOP)
153
154 /**
155 * @brief IWDG Peripherals Debug mode
156 */
157 #define __HAL_DBGMCU_FREEZE_IWDG() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_IWDG_STOP)
158 #define __HAL_DBGMCU_UNFREEZE_IWDG() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_IWDG_STOP)
159
160 /**
161 * @brief I2C1 Peripherals Debug mode
162 */
163 #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT)
164 #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT)
165
166 #if defined (DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT)
167 /**
168 * @brief I2C2 Peripherals Debug mode
169 */
170 #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT)
171 #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT)
172 #endif
173
174 #if defined (DBGMCU_CR_DBG_CAN1_STOP)
175 /**
176 * @brief CAN1 Peripherals Debug mode
177 */
178 #define __HAL_DBGMCU_FREEZE_CAN1() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN1_STOP)
179 #define __HAL_DBGMCU_UNFREEZE_CAN1() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN1_STOP)
180 #endif
181
182 #if defined (DBGMCU_CR_DBG_CAN2_STOP)
183 /**
184 * @brief CAN2 Peripherals Debug mode
185 */
186 #define __HAL_DBGMCU_FREEZE_CAN2() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN2_STOP)
187 #define __HAL_DBGMCU_UNFREEZE_CAN2() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN2_STOP)
188 #endif
189
190 /* Peripherals on APB2 */
191 #if defined (DBGMCU_CR_DBG_TIM1_STOP)
192 /**
193 * @brief TIM1 Peripherals Debug mode
194 */
195 #define __HAL_DBGMCU_FREEZE_TIM1() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM1_STOP)
196 #define __HAL_DBGMCU_UNFREEZE_TIM1() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM1_STOP)
197 #endif
198
199 #if defined (DBGMCU_CR_DBG_TIM8_STOP)
200 /**
201 * @brief TIM8 Peripherals Debug mode
202 */
203 #define __HAL_DBGMCU_FREEZE_TIM8() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM8_STOP)
204 #define __HAL_DBGMCU_UNFREEZE_TIM8() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM8_STOP)
205 #endif
206
207 #if defined (DBGMCU_CR_DBG_TIM9_STOP)
208 /**
209 * @brief TIM9 Peripherals Debug mode
210 */
211 #define __HAL_DBGMCU_FREEZE_TIM9() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM9_STOP)
212 #define __HAL_DBGMCU_UNFREEZE_TIM9() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM9_STOP)
213 #endif
214
215 #if defined (DBGMCU_CR_DBG_TIM10_STOP)
216 /**
217 * @brief TIM10 Peripherals Debug mode
218 */
219 #define __HAL_DBGMCU_FREEZE_TIM10() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM10_STOP)
220 #define __HAL_DBGMCU_UNFREEZE_TIM10() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM10_STOP)
221 #endif
222
223 #if defined (DBGMCU_CR_DBG_TIM11_STOP)
224 /**
225 * @brief TIM11 Peripherals Debug mode
226 */
227 #define __HAL_DBGMCU_FREEZE_TIM11() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM11_STOP)
228 #define __HAL_DBGMCU_UNFREEZE_TIM11() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM11_STOP)
229 #endif
230
231
232 #if defined (DBGMCU_CR_DBG_TIM15_STOP)
233 /**
234 * @brief TIM15 Peripherals Debug mode
235 */
236 #define __HAL_DBGMCU_FREEZE_TIM15() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM15_STOP)
237 #define __HAL_DBGMCU_UNFREEZE_TIM15() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM15_STOP)
238 #endif
239
240 #if defined (DBGMCU_CR_DBG_TIM16_STOP)
241 /**
242 * @brief TIM16 Peripherals Debug mode
243 */
244 #define __HAL_DBGMCU_FREEZE_TIM16() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM16_STOP)
245 #define __HAL_DBGMCU_UNFREEZE_TIM16() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM16_STOP)
246 #endif
247
248 #if defined (DBGMCU_CR_DBG_TIM17_STOP)
249 /**
250 * @brief TIM17 Peripherals Debug mode
251 */
252 #define __HAL_DBGMCU_FREEZE_TIM17() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM17_STOP)
253 #define __HAL_DBGMCU_UNFREEZE_TIM17() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM17_STOP)
254 #endif
255
256 /**
257 * @}
258 */
259
260 /**
261 * @}
262 */
263
264 /* Exported functions --------------------------------------------------------*/
265
266 /** @addtogroup HAL_Exported_Functions
267 * @{
268 */
269
270 /** @addtogroup HAL_Exported_Functions_Group1
271 * @{
272 */
273
274 /* Initialization and de-initialization functions ******************************/
275 HAL_StatusTypeDef HAL_Init(void);
276 HAL_StatusTypeDef HAL_DeInit(void);
277 void HAL_MspInit(void);
278 void HAL_MspDeInit(void);
279 HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
280
281 /**
282 * @}
283 */
284
285 /** @addtogroup HAL_Exported_Functions_Group2
286 * @{
287 */
288
289 /* Peripheral Control functions ************************************************/
290 void HAL_IncTick(void);
291 void HAL_Delay(__IO uint32_t Delay);
292 uint32_t HAL_GetTick(void);
293 void HAL_SuspendTick(void);
294 void HAL_ResumeTick(void);
295 uint32_t HAL_GetHalVersion(void);
296 uint32_t HAL_GetREVID(void);
297 uint32_t HAL_GetDEVID(void);
298 void HAL_DBGMCU_EnableDBGSleepMode(void);
299 void HAL_DBGMCU_DisableDBGSleepMode(void);
300 void HAL_DBGMCU_EnableDBGStopMode(void);
301 void HAL_DBGMCU_DisableDBGStopMode(void);
302 void HAL_DBGMCU_EnableDBGStandbyMode(void);
303 void HAL_DBGMCU_DisableDBGStandbyMode(void);
304
305 /**
306 * @}
307 */
308
309 /**
310 * @}
311 */
312
313
314 /**
315 * @}
316 */
317
318 /**
319 * @}
320 */
321
322 #ifdef __cplusplus
323 }
324 #endif
325
326 #endif /* __STM32F1xx_HAL_H */
327
328 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/