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comparison f103c8/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h @ 2:0c59e7a7782a

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Working on GPIO and RCC
author cin
date Mon, 16 Jan 2017 11:04:47 +0300
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1:a0b14b11ad9f 2:0c59e7a7782a
1 /**
2 ******************************************************************************
3 * @file stm32f1xx_hal_flash_ex.h
4 * @author MCD Application Team
5 * @version V1.0.4
6 * @date 29-April-2016
7 * @brief Header file of Flash HAL Extended module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F1xx_HAL_FLASH_EX_H
40 #define __STM32F1xx_HAL_FLASH_EX_H
41
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32f1xx_hal_def.h"
48
49 /** @addtogroup STM32F1xx_HAL_Driver
50 * @{
51 */
52
53 /** @addtogroup FLASHEx
54 * @{
55 */
56
57 /** @addtogroup FLASHEx_Private_Constants
58 * @{
59 */
60
61 #define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFFF7E0)
62 #define OBR_REG_INDEX ((uint32_t)1)
63 #define SR_FLAG_MASK ((uint32_t)(FLASH_SR_BSY | FLASH_SR_PGERR | FLASH_SR_WRPRTERR | FLASH_SR_EOP))
64
65 /**
66 * @}
67 */
68
69 /** @addtogroup FLASHEx_Private_Macros
70 * @{
71 */
72
73 #define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_PAGES) || ((VALUE) == FLASH_TYPEERASE_MASSERASE))
74
75 #define IS_OPTIONBYTE(VALUE) (((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_DATA)))
76
77 #define IS_WRPSTATE(VALUE) (((VALUE) == OB_WRPSTATE_DISABLE) || ((VALUE) == OB_WRPSTATE_ENABLE))
78
79 #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) || ((LEVEL) == OB_RDP_LEVEL_1))
80
81 #define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == OB_DATA_ADDRESS_DATA0) || ((ADDRESS) == OB_DATA_ADDRESS_DATA1))
82
83 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
84
85 #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST))
86
87 #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST))
88
89 #if defined(FLASH_BANK2_END)
90 #define IS_OB_BOOT1(BOOT1) (((BOOT1) == OB_BOOT1_RESET) || ((BOOT1) == OB_BOOT1_SET))
91 #endif /* FLASH_BANK2_END */
92
93 /* Low Density */
94 #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6))
95 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08007FFF) : \
96 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08003FFF))
97 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */
98
99 /* Medium Density */
100 #if (defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB))
101 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFF) : \
102 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFF) : \
103 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08007FFF) : \
104 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08003FFF))))
105 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/
106
107 /* High Density */
108 #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE))
109 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0807FFFF) : \
110 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0805FFFF) : \
111 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFF)))
112 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */
113
114 /* XL Density */
115 #if defined(FLASH_BANK2_END)
116 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080FFFFF) : \
117 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080BFFFF))
118 #endif /* FLASH_BANK2_END */
119
120 /* Connectivity Line */
121 #if (defined(STM32F105xC) || defined(STM32F107xC))
122 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFF) : \
123 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFF) : \
124 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFF)))
125 #endif /* STM32F105xC || STM32F107xC */
126
127 #define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000))
128
129 #if defined(FLASH_BANK2_END)
130 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \
131 ((BANK) == FLASH_BANK_2) || \
132 ((BANK) == FLASH_BANK_BOTH))
133 #else
134 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1))
135 #endif /* FLASH_BANK2_END */
136
137 /* Low Density */
138 #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6))
139 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? \
140 ((ADDRESS) <= FLASH_BANK1_END) : ((ADDRESS) <= 0x08003FFF)))
141
142 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */
143
144 /* Medium Density */
145 #if (defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB))
146 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? \
147 ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40) ? \
148 ((ADDRESS) <= 0x0800FFFF) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? \
149 ((ADDRESS) <= 0x08007FFF) : ((ADDRESS) <= 0x08003FFF)))))
150
151 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/
152
153 /* High Density */
154 #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE))
155 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200) ? \
156 ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180) ? \
157 ((ADDRESS) <= 0x0805FFFF) : ((ADDRESS) <= 0x0803FFFF))))
158
159 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */
160
161 /* XL Density */
162 #if defined(FLASH_BANK2_END)
163 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400) ? \
164 ((ADDRESS) <= FLASH_BANK2_END) : ((ADDRESS) <= 0x080BFFFF)))
165
166 #endif /* FLASH_BANK2_END */
167
168 /* Connectivity Line */
169 #if (defined(STM32F105xC) || defined(STM32F107xC))
170 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100) ? \
171 ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? \
172 ((ADDRESS) <= 0x0801FFFF) : ((ADDRESS) <= 0x0800FFFF))))
173
174 #endif /* STM32F105xC || STM32F107xC */
175
176 /**
177 * @}
178 */
179
180 /* Exported types ------------------------------------------------------------*/
181 /** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types
182 * @{
183 */
184
185 /**
186 * @brief FLASH Erase structure definition
187 */
188 typedef struct
189 {
190 uint32_t TypeErase; /*!< TypeErase: Mass erase or page erase.
191 This parameter can be a value of @ref FLASHEx_Type_Erase */
192
193 uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled.
194 This parameter must be a value of @ref FLASHEx_Banks */
195
196 uint32_t PageAddress; /*!< PageAdress: Initial FLASH page address to erase when mass erase is disabled
197 This parameter must be a number between Min_Data = 0x08000000 and Max_Data = FLASH_BANKx_END
198 (x = 1 or 2 depending on devices)*/
199
200 uint32_t NbPages; /*!< NbPages: Number of pagess to be erased.
201 This parameter must be a value between Min_Data = 1 and Max_Data = (max number of pages - value of initial page)*/
202
203 } FLASH_EraseInitTypeDef;
204
205 /**
206 * @brief FLASH Options bytes program structure definition
207 */
208 typedef struct
209 {
210 uint32_t OptionType; /*!< OptionType: Option byte to be configured.
211 This parameter can be a value of @ref FLASHEx_OB_Type */
212
213 uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation.
214 This parameter can be a value of @ref FLASHEx_OB_WRP_State */
215
216 uint32_t WRPPage; /*!< WRPPage: specifies the page(s) to be write protected
217 This parameter can be a value of @ref FLASHEx_OB_Write_Protection */
218
219 uint32_t Banks; /*!< Select banks for WRP activation/deactivation of all sectors.
220 This parameter must be a value of @ref FLASHEx_Banks */
221
222 uint8_t RDPLevel; /*!< RDPLevel: Set the read protection level..
223 This parameter can be a value of @ref FLASHEx_OB_Read_Protection */
224
225 #if defined(FLASH_BANK2_END)
226 uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte:
227 IWDG / STOP / STDBY / BOOT1
228 This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP,
229 @ref FLASHEx_OB_nRST_STDBY, @ref FLASHEx_OB_BOOT1 */
230 #else
231 uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte:
232 IWDG / STOP / STDBY
233 This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP,
234 @ref FLASHEx_OB_nRST_STDBY */
235 #endif /* FLASH_BANK2_END */
236
237 uint32_t DATAAddress; /*!< DATAAddress: Address of the option byte DATA to be programmed
238 This parameter can be a value of @ref FLASHEx_OB_Data_Address */
239
240 uint8_t DATAData; /*!< DATAData: Data to be stored in the option byte DATA
241 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */
242 } FLASH_OBProgramInitTypeDef;
243
244 /**
245 * @}
246 */
247
248 /* Exported constants --------------------------------------------------------*/
249 /** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants
250 * @{
251 */
252
253 /** @defgroup FLASHEx_Constants FLASH Constants
254 * @{
255 */
256
257 /** @defgroup FLASHEx_Page_Size Page Size
258 * @{
259 */
260 #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) || defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB))
261 #define FLASH_PAGE_SIZE ((uint32_t)0x400)
262 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */
263 /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */
264
265 #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC))
266 #define FLASH_PAGE_SIZE ((uint32_t)0x800)
267 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */
268 /* STM32F101xG || STM32F103xG */
269 /* STM32F105xC || STM32F107xC */
270
271 /**
272 * @}
273 */
274
275 /** @defgroup FLASHEx_Type_Erase Type Erase
276 * @{
277 */
278 #define FLASH_TYPEERASE_PAGES ((uint32_t)0x00) /*!<Pages erase only*/
279 #define FLASH_TYPEERASE_MASSERASE ((uint32_t)0x02) /*!<Flash mass erase activation*/
280
281 /**
282 * @}
283 */
284
285 /** @defgroup FLASHEx_Banks Banks
286 * @{
287 */
288 #if defined(FLASH_BANK2_END)
289 #define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */
290 #define FLASH_BANK_2 ((uint32_t)2) /*!< Bank 2 */
291 #define FLASH_BANK_BOTH ((uint32_t)FLASH_BANK_1 | FLASH_BANK_2) /*!< Bank1 and Bank2 */
292
293 #else
294 #define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */
295 #endif
296 /**
297 * @}
298 */
299
300 /**
301 * @}
302 */
303
304 /** @defgroup FLASHEx_OptionByte_Constants Option Byte Constants
305 * @{
306 */
307
308 /** @defgroup FLASHEx_OB_Type Option Bytes Type
309 * @{
310 */
311 #define OPTIONBYTE_WRP ((uint32_t)0x01) /*!<WRP option byte configuration*/
312 #define OPTIONBYTE_RDP ((uint32_t)0x02) /*!<RDP option byte configuration*/
313 #define OPTIONBYTE_USER ((uint32_t)0x04) /*!<USER option byte configuration*/
314 #define OPTIONBYTE_DATA ((uint32_t)0x08) /*!<DATA option byte configuration*/
315
316 /**
317 * @}
318 */
319
320 /** @defgroup FLASHEx_OB_WRP_State Option Byte WRP State
321 * @{
322 */
323 #define OB_WRPSTATE_DISABLE ((uint32_t)0x00) /*!<Disable the write protection of the desired pages*/
324 #define OB_WRPSTATE_ENABLE ((uint32_t)0x01) /*!<Enable the write protection of the desired pagess*/
325
326 /**
327 * @}
328 */
329
330 /** @defgroup FLASHEx_OB_Write_Protection Option Bytes Write Protection
331 * @{
332 */
333 /* STM32 Low and Medium density devices */
334 #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) \
335 || defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) \
336 || defined(STM32F103xB)
337 #define OB_WRP_PAGES0TO3 ((uint32_t)0x00000001) /*!< Write protection of page 0 to 3 */
338 #define OB_WRP_PAGES4TO7 ((uint32_t)0x00000002) /*!< Write protection of page 4 to 7 */
339 #define OB_WRP_PAGES8TO11 ((uint32_t)0x00000004) /*!< Write protection of page 8 to 11 */
340 #define OB_WRP_PAGES12TO15 ((uint32_t)0x00000008) /*!< Write protection of page 12 to 15 */
341 #define OB_WRP_PAGES16TO19 ((uint32_t)0x00000010) /*!< Write protection of page 16 to 19 */
342 #define OB_WRP_PAGES20TO23 ((uint32_t)0x00000020) /*!< Write protection of page 20 to 23 */
343 #define OB_WRP_PAGES24TO27 ((uint32_t)0x00000040) /*!< Write protection of page 24 to 27 */
344 #define OB_WRP_PAGES28TO31 ((uint32_t)0x00000080) /*!< Write protection of page 28 to 31 */
345 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */
346 /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */
347
348 /* STM32 Medium-density devices */
349 #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)
350 #define OB_WRP_PAGES32TO35 ((uint32_t)0x00000100) /*!< Write protection of page 32 to 35 */
351 #define OB_WRP_PAGES36TO39 ((uint32_t)0x00000200) /*!< Write protection of page 36 to 39 */
352 #define OB_WRP_PAGES40TO43 ((uint32_t)0x00000400) /*!< Write protection of page 40 to 43 */
353 #define OB_WRP_PAGES44TO47 ((uint32_t)0x00000800) /*!< Write protection of page 44 to 47 */
354 #define OB_WRP_PAGES48TO51 ((uint32_t)0x00001000) /*!< Write protection of page 48 to 51 */
355 #define OB_WRP_PAGES52TO55 ((uint32_t)0x00002000) /*!< Write protection of page 52 to 55 */
356 #define OB_WRP_PAGES56TO59 ((uint32_t)0x00004000) /*!< Write protection of page 56 to 59 */
357 #define OB_WRP_PAGES60TO63 ((uint32_t)0x00008000) /*!< Write protection of page 60 to 63 */
358 #define OB_WRP_PAGES64TO67 ((uint32_t)0x00010000) /*!< Write protection of page 64 to 67 */
359 #define OB_WRP_PAGES68TO71 ((uint32_t)0x00020000) /*!< Write protection of page 68 to 71 */
360 #define OB_WRP_PAGES72TO75 ((uint32_t)0x00040000) /*!< Write protection of page 72 to 75 */
361 #define OB_WRP_PAGES76TO79 ((uint32_t)0x00080000) /*!< Write protection of page 76 to 79 */
362 #define OB_WRP_PAGES80TO83 ((uint32_t)0x00100000) /*!< Write protection of page 80 to 83 */
363 #define OB_WRP_PAGES84TO87 ((uint32_t)0x00200000) /*!< Write protection of page 84 to 87 */
364 #define OB_WRP_PAGES88TO91 ((uint32_t)0x00400000) /*!< Write protection of page 88 to 91 */
365 #define OB_WRP_PAGES92TO95 ((uint32_t)0x00800000) /*!< Write protection of page 92 to 95 */
366 #define OB_WRP_PAGES96TO99 ((uint32_t)0x01000000) /*!< Write protection of page 96 to 99 */
367 #define OB_WRP_PAGES100TO103 ((uint32_t)0x02000000) /*!< Write protection of page 100 to 103 */
368 #define OB_WRP_PAGES104TO107 ((uint32_t)0x04000000) /*!< Write protection of page 104 to 107 */
369 #define OB_WRP_PAGES108TO111 ((uint32_t)0x08000000) /*!< Write protection of page 108 to 111 */
370 #define OB_WRP_PAGES112TO115 ((uint32_t)0x10000000) /*!< Write protection of page 112 to 115 */
371 #define OB_WRP_PAGES116TO119 ((uint32_t)0x20000000) /*!< Write protection of page 115 to 119 */
372 #define OB_WRP_PAGES120TO123 ((uint32_t)0x40000000) /*!< Write protection of page 120 to 123 */
373 #define OB_WRP_PAGES124TO127 ((uint32_t)0x80000000) /*!< Write protection of page 124 to 127 */
374 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */
375
376
377 /* STM32 High-density, XL-density and Connectivity line devices */
378 #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) \
379 || defined(STM32F101xG) || defined(STM32F103xG) \
380 || defined(STM32F105xC) || defined(STM32F107xC)
381 #define OB_WRP_PAGES0TO1 ((uint32_t)0x00000001) /*!< Write protection of page 0 TO 1 */
382 #define OB_WRP_PAGES2TO3 ((uint32_t)0x00000002) /*!< Write protection of page 2 TO 3 */
383 #define OB_WRP_PAGES4TO5 ((uint32_t)0x00000004) /*!< Write protection of page 4 TO 5 */
384 #define OB_WRP_PAGES6TO7 ((uint32_t)0x00000008) /*!< Write protection of page 6 TO 7 */
385 #define OB_WRP_PAGES8TO9 ((uint32_t)0x00000010) /*!< Write protection of page 8 TO 9 */
386 #define OB_WRP_PAGES10TO11 ((uint32_t)0x00000020) /*!< Write protection of page 10 TO 11 */
387 #define OB_WRP_PAGES12TO13 ((uint32_t)0x00000040) /*!< Write protection of page 12 TO 13 */
388 #define OB_WRP_PAGES14TO15 ((uint32_t)0x00000080) /*!< Write protection of page 14 TO 15 */
389 #define OB_WRP_PAGES16TO17 ((uint32_t)0x00000100) /*!< Write protection of page 16 TO 17 */
390 #define OB_WRP_PAGES18TO19 ((uint32_t)0x00000200) /*!< Write protection of page 18 TO 19 */
391 #define OB_WRP_PAGES20TO21 ((uint32_t)0x00000400) /*!< Write protection of page 20 TO 21 */
392 #define OB_WRP_PAGES22TO23 ((uint32_t)0x00000800) /*!< Write protection of page 22 TO 23 */
393 #define OB_WRP_PAGES24TO25 ((uint32_t)0x00001000) /*!< Write protection of page 24 TO 25 */
394 #define OB_WRP_PAGES26TO27 ((uint32_t)0x00002000) /*!< Write protection of page 26 TO 27 */
395 #define OB_WRP_PAGES28TO29 ((uint32_t)0x00004000) /*!< Write protection of page 28 TO 29 */
396 #define OB_WRP_PAGES30TO31 ((uint32_t)0x00008000) /*!< Write protection of page 30 TO 31 */
397 #define OB_WRP_PAGES32TO33 ((uint32_t)0x00010000) /*!< Write protection of page 32 TO 33 */
398 #define OB_WRP_PAGES34TO35 ((uint32_t)0x00020000) /*!< Write protection of page 34 TO 35 */
399 #define OB_WRP_PAGES36TO37 ((uint32_t)0x00040000) /*!< Write protection of page 36 TO 37 */
400 #define OB_WRP_PAGES38TO39 ((uint32_t)0x00080000) /*!< Write protection of page 38 TO 39 */
401 #define OB_WRP_PAGES40TO41 ((uint32_t)0x00100000) /*!< Write protection of page 40 TO 41 */
402 #define OB_WRP_PAGES42TO43 ((uint32_t)0x00200000) /*!< Write protection of page 42 TO 43 */
403 #define OB_WRP_PAGES44TO45 ((uint32_t)0x00400000) /*!< Write protection of page 44 TO 45 */
404 #define OB_WRP_PAGES46TO47 ((uint32_t)0x00800000) /*!< Write protection of page 46 TO 47 */
405 #define OB_WRP_PAGES48TO49 ((uint32_t)0x01000000) /*!< Write protection of page 48 TO 49 */
406 #define OB_WRP_PAGES50TO51 ((uint32_t)0x02000000) /*!< Write protection of page 50 TO 51 */
407 #define OB_WRP_PAGES52TO53 ((uint32_t)0x04000000) /*!< Write protection of page 52 TO 53 */
408 #define OB_WRP_PAGES54TO55 ((uint32_t)0x08000000) /*!< Write protection of page 54 TO 55 */
409 #define OB_WRP_PAGES56TO57 ((uint32_t)0x10000000) /*!< Write protection of page 56 TO 57 */
410 #define OB_WRP_PAGES58TO59 ((uint32_t)0x20000000) /*!< Write protection of page 58 TO 59 */
411 #define OB_WRP_PAGES60TO61 ((uint32_t)0x40000000) /*!< Write protection of page 60 TO 61 */
412 #define OB_WRP_PAGES62TO127 ((uint32_t)0x80000000) /*!< Write protection of page 62 TO 127 */
413 #define OB_WRP_PAGES62TO255 ((uint32_t)0x80000000) /*!< Write protection of page 62 TO 255 */
414 #define OB_WRP_PAGES62TO511 ((uint32_t)0x80000000) /*!< Write protection of page 62 TO 511 */
415 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */
416 /* STM32F101xG || STM32F103xG */
417 /* STM32F105xC || STM32F107xC */
418
419 #define OB_WRP_ALLPAGES ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Pages */
420
421 /* Low Density */
422 #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6)
423 #define OB_WRP_PAGES0TO31MASK ((uint32_t)0x000000FF)
424 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */
425
426 /* Medium Density */
427 #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)
428 #define OB_WRP_PAGES0TO31MASK ((uint32_t)0x000000FF)
429 #define OB_WRP_PAGES32TO63MASK ((uint32_t)0x0000FF00)
430 #define OB_WRP_PAGES64TO95MASK ((uint32_t)0x00FF0000)
431 #define OB_WRP_PAGES96TO127MASK ((uint32_t)0xFF000000)
432 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/
433
434 /* High Density */
435 #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE)
436 #define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF)
437 #define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00)
438 #define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000)
439 #define OB_WRP_PAGES48TO255MASK ((uint32_t)0xFF000000)
440 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */
441
442 /* XL Density */
443 #if defined(STM32F101xG) || defined(STM32F103xG)
444 #define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF)
445 #define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00)
446 #define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000)
447 #define OB_WRP_PAGES48TO511MASK ((uint32_t)0xFF000000)
448 #endif /* STM32F101xG || STM32F103xG */
449
450 /* Connectivity line devices */
451 #if defined(STM32F105xC) || defined(STM32F107xC)
452 #define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF)
453 #define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00)
454 #define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000)
455 #define OB_WRP_PAGES48TO127MASK ((uint32_t)0xFF000000)
456 #endif /* STM32F105xC || STM32F107xC */
457
458 /**
459 * @}
460 */
461
462 /** @defgroup FLASHEx_OB_Read_Protection Option Byte Read Protection
463 * @{
464 */
465 #define OB_RDP_LEVEL_0 ((uint8_t)0xA5)
466 #define OB_RDP_LEVEL_1 ((uint8_t)0x00)
467 /**
468 * @}
469 */
470
471 /** @defgroup FLASHEx_OB_IWatchdog Option Byte IWatchdog
472 * @{
473 */
474 #define OB_IWDG_SW ((uint16_t)0x0001) /*!< Software IWDG selected */
475 #define OB_IWDG_HW ((uint16_t)0x0000) /*!< Hardware IWDG selected */
476 /**
477 * @}
478 */
479
480 /** @defgroup FLASHEx_OB_nRST_STOP Option Byte nRST STOP
481 * @{
482 */
483 #define OB_STOP_NO_RST ((uint16_t)0x0002) /*!< No reset generated when entering in STOP */
484 #define OB_STOP_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STOP */
485 /**
486 * @}
487 */
488
489 /** @defgroup FLASHEx_OB_nRST_STDBY Option Byte nRST STDBY
490 * @{
491 */
492 #define OB_STDBY_NO_RST ((uint16_t)0x0004) /*!< No reset generated when entering in STANDBY */
493 #define OB_STDBY_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STANDBY */
494 /**
495 * @}
496 */
497
498 #if defined(FLASH_BANK2_END)
499 /** @defgroup FLASHEx_OB_BOOT1 Option Byte BOOT1
500 * @{
501 */
502 #define OB_BOOT1_RESET ((uint16_t)0x0000) /*!< BOOT1 Reset */
503 #define OB_BOOT1_SET ((uint16_t)0x0008) /*!< BOOT1 Set */
504 /**
505 * @}
506 */
507 #endif /* FLASH_BANK2_END */
508
509 /** @defgroup FLASHEx_OB_Data_Address Option Byte Data Address
510 * @{
511 */
512 #define OB_DATA_ADDRESS_DATA0 ((uint32_t)0x1FFFF804)
513 #define OB_DATA_ADDRESS_DATA1 ((uint32_t)0x1FFFF806)
514 /**
515 * @}
516 */
517
518 /**
519 * @}
520 */
521
522 /** @addtogroup FLASHEx_Constants
523 * @{
524 */
525
526 /** @defgroup FLASH_Flag_definition Flag definition
527 * @brief Flag definition
528 * @{
529 */
530 #if defined(FLASH_BANK2_END)
531 #define FLASH_FLAG_BSY FLASH_FLAG_BSY_BANK1 /*!< FLASH Bank1 Busy flag */
532 #define FLASH_FLAG_PGERR FLASH_FLAG_PGERR_BANK1 /*!< FLASH Bank1 Programming error flag */
533 #define FLASH_FLAG_WRPERR FLASH_FLAG_WRPERR_BANK1 /*!< FLASH Bank1 Write protected error flag */
534 #define FLASH_FLAG_EOP FLASH_FLAG_EOP_BANK1 /*!< FLASH Bank1 End of Operation flag */
535
536 #define FLASH_FLAG_BSY_BANK1 FLASH_SR_BSY /*!< FLASH Bank1 Busy flag */
537 #define FLASH_FLAG_PGERR_BANK1 FLASH_SR_PGERR /*!< FLASH Bank1 Programming error flag */
538 #define FLASH_FLAG_WRPERR_BANK1 FLASH_SR_WRPRTERR /*!< FLASH Bank1 Write protected error flag */
539 #define FLASH_FLAG_EOP_BANK1 FLASH_SR_EOP /*!< FLASH Bank1 End of Operation flag */
540
541 #define FLASH_FLAG_BSY_BANK2 (FLASH_SR2_BSY << 16) /*!< FLASH Bank2 Busy flag */
542 #define FLASH_FLAG_PGERR_BANK2 (FLASH_SR2_PGERR << 16) /*!< FLASH Bank2 Programming error flag */
543 #define FLASH_FLAG_WRPERR_BANK2 (FLASH_SR2_WRPRTERR << 16) /*!< FLASH Bank2 Write protected error flag */
544 #define FLASH_FLAG_EOP_BANK2 (FLASH_SR2_EOP << 16) /*!< FLASH Bank2 End of Operation flag */
545
546 #else
547
548 #define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */
549 #define FLASH_FLAG_PGERR FLASH_SR_PGERR /*!< FLASH Programming error flag */
550 #define FLASH_FLAG_WRPERR FLASH_SR_WRPRTERR /*!< FLASH Write protected error flag */
551 #define FLASH_FLAG_EOP FLASH_SR_EOP /*!< FLASH End of Operation flag */
552
553 #endif
554 #define FLASH_FLAG_OPTVERR ((OBR_REG_INDEX << 8 | FLASH_OBR_OPTERR)) /*!< Option Byte Error */
555 /**
556 * @}
557 */
558
559 /** @defgroup FLASH_Interrupt_definition Interrupt definition
560 * @brief FLASH Interrupt definition
561 * @{
562 */
563 #if defined(FLASH_BANK2_END)
564 #define FLASH_IT_EOP FLASH_IT_EOP_BANK1 /*!< End of FLASH Operation Interrupt source Bank1 */
565 #define FLASH_IT_ERR FLASH_IT_ERR_BANK1 /*!< Error Interrupt source Bank1 */
566
567 #define FLASH_IT_EOP_BANK1 FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source Bank1 */
568 #define FLASH_IT_ERR_BANK1 FLASH_CR_ERRIE /*!< Error Interrupt source Bank1 */
569
570 #define FLASH_IT_EOP_BANK2 (FLASH_CR2_EOPIE << 16) /*!< End of FLASH Operation Interrupt source Bank2 */
571 #define FLASH_IT_ERR_BANK2 (FLASH_CR2_ERRIE << 16) /*!< Error Interrupt source Bank2 */
572
573 #else
574
575 #define FLASH_IT_EOP FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source */
576 #define FLASH_IT_ERR FLASH_CR_ERRIE /*!< Error Interrupt source */
577
578 #endif
579 /**
580 * @}
581 */
582
583 /**
584 * @}
585 */
586
587
588 /**
589 * @}
590 */
591
592 /* Exported macro ------------------------------------------------------------*/
593 /** @defgroup FLASHEx_Exported_Macros FLASHEx Exported Macros
594 * @{
595 */
596
597 /** @defgroup FLASH_Interrupt Interrupt
598 * @brief macros to handle FLASH interrupts
599 * @{
600 */
601
602 #if defined(FLASH_BANK2_END)
603 /**
604 * @brief Enable the specified FLASH interrupt.
605 * @param __INTERRUPT__ FLASH interrupt
606 * This parameter can be any combination of the following values:
607 * @arg @ref FLASH_IT_EOP_BANK1 End of FLASH Operation Interrupt on bank1
608 * @arg @ref FLASH_IT_ERR_BANK1 Error Interrupt on bank1
609 * @arg @ref FLASH_IT_EOP_BANK2 End of FLASH Operation Interrupt on bank2
610 * @arg @ref FLASH_IT_ERR_BANK2 Error Interrupt on bank2
611 * @retval none
612 */
613 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) do { \
614 /* Enable Bank1 IT */ \
615 SET_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFF)); \
616 /* Enable Bank2 IT */ \
617 SET_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16)); \
618 } while(0)
619
620 /**
621 * @brief Disable the specified FLASH interrupt.
622 * @param __INTERRUPT__ FLASH interrupt
623 * This parameter can be any combination of the following values:
624 * @arg @ref FLASH_IT_EOP_BANK1 End of FLASH Operation Interrupt on bank1
625 * @arg @ref FLASH_IT_ERR_BANK1 Error Interrupt on bank1
626 * @arg @ref FLASH_IT_EOP_BANK2 End of FLASH Operation Interrupt on bank2
627 * @arg @ref FLASH_IT_ERR_BANK2 Error Interrupt on bank2
628 * @retval none
629 */
630 #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) do { \
631 /* Disable Bank1 IT */ \
632 CLEAR_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFF)); \
633 /* Disable Bank2 IT */ \
634 CLEAR_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16)); \
635 } while(0)
636
637 /**
638 * @brief Get the specified FLASH flag status.
639 * @param __FLAG__ specifies the FLASH flag to check.
640 * This parameter can be one of the following values:
641 * @arg @ref FLASH_FLAG_EOP_BANK1 FLASH End of Operation flag on bank1
642 * @arg @ref FLASH_FLAG_WRPERR_BANK1 FLASH Write protected error flag on bank1
643 * @arg @ref FLASH_FLAG_PGERR_BANK1 FLASH Programming error flag on bank1
644 * @arg @ref FLASH_FLAG_BSY_BANK1 FLASH Busy flag on bank1
645 * @arg @ref FLASH_FLAG_EOP_BANK2 FLASH End of Operation flag on bank2
646 * @arg @ref FLASH_FLAG_WRPERR_BANK2 FLASH Write protected error flag on bank2
647 * @arg @ref FLASH_FLAG_PGERR_BANK2 FLASH Programming error flag on bank2
648 * @arg @ref FLASH_FLAG_BSY_BANK2 FLASH Busy flag on bank2
649 * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match
650 * @retval The new state of __FLAG__ (SET or RESET).
651 */
652 #define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) == FLASH_FLAG_OPTVERR) ? \
653 (FLASH->OBR & FLASH_OBR_OPTERR) : \
654 ((((__FLAG__) & SR_FLAG_MASK) != RESET)? \
655 (FLASH->SR & ((__FLAG__) & SR_FLAG_MASK)) : \
656 (FLASH->SR2 & ((__FLAG__) >> 16))))
657
658 /**
659 * @brief Clear the specified FLASH flag.
660 * @param __FLAG__ specifies the FLASH flags to clear.
661 * This parameter can be any combination of the following values:
662 * @arg @ref FLASH_FLAG_EOP_BANK1 FLASH End of Operation flag on bank1
663 * @arg @ref FLASH_FLAG_WRPERR_BANK1 FLASH Write protected error flag on bank1
664 * @arg @ref FLASH_FLAG_PGERR_BANK1 FLASH Programming error flag on bank1
665 * @arg @ref FLASH_FLAG_BSY_BANK1 FLASH Busy flag on bank1
666 * @arg @ref FLASH_FLAG_EOP_BANK2 FLASH End of Operation flag on bank2
667 * @arg @ref FLASH_FLAG_WRPERR_BANK2 FLASH Write protected error flag on bank2
668 * @arg @ref FLASH_FLAG_PGERR_BANK2 FLASH Programming error flag on bank2
669 * @arg @ref FLASH_FLAG_BSY_BANK2 FLASH Busy flag on bank2
670 * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match
671 * @retval none
672 */
673 #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { \
674 /* Clear FLASH_FLAG_OPTVERR flag */ \
675 if ((__FLAG__) == FLASH_FLAG_OPTVERR) \
676 { \
677 CLEAR_BIT(FLASH->OBR, FLASH_OBR_OPTERR); \
678 } \
679 else { \
680 /* Clear Flag in Bank1 */ \
681 if (((__FLAG__) & SR_FLAG_MASK) != RESET) \
682 { \
683 FLASH->SR = ((__FLAG__) & SR_FLAG_MASK); \
684 } \
685 /* Clear Flag in Bank2 */ \
686 if (((__FLAG__) >> 16) != RESET) \
687 { \
688 FLASH->SR2 = ((__FLAG__) >> 16); \
689 } \
690 } \
691 } while(0)
692 #else
693 /**
694 * @brief Enable the specified FLASH interrupt.
695 * @param __INTERRUPT__ FLASH interrupt
696 * This parameter can be any combination of the following values:
697 * @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt
698 * @arg @ref FLASH_IT_ERR Error Interrupt
699 * @retval none
700 */
701 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) (FLASH->CR |= (__INTERRUPT__))
702
703 /**
704 * @brief Disable the specified FLASH interrupt.
705 * @param __INTERRUPT__ FLASH interrupt
706 * This parameter can be any combination of the following values:
707 * @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt
708 * @arg @ref FLASH_IT_ERR Error Interrupt
709 * @retval none
710 */
711 #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) (FLASH->CR &= ~(__INTERRUPT__))
712
713 /**
714 * @brief Get the specified FLASH flag status.
715 * @param __FLAG__ specifies the FLASH flag to check.
716 * This parameter can be one of the following values:
717 * @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag
718 * @arg @ref FLASH_FLAG_WRPERR FLASH Write protected error flag
719 * @arg @ref FLASH_FLAG_PGERR FLASH Programming error flag
720 * @arg @ref FLASH_FLAG_BSY FLASH Busy flag
721 * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match
722 * @retval The new state of __FLAG__ (SET or RESET).
723 */
724 #define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) == FLASH_FLAG_OPTVERR) ? \
725 (FLASH->OBR & FLASH_OBR_OPTERR) : \
726 (FLASH->SR & (__FLAG__)))
727 /**
728 * @brief Clear the specified FLASH flag.
729 * @param __FLAG__ specifies the FLASH flags to clear.
730 * This parameter can be any combination of the following values:
731 * @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag
732 * @arg @ref FLASH_FLAG_WRPERR FLASH Write protected error flag
733 * @arg @ref FLASH_FLAG_PGERR FLASH Programming error flag
734 * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match
735 * @retval none
736 */
737 #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { \
738 /* Clear FLASH_FLAG_OPTVERR flag */ \
739 if ((__FLAG__) == FLASH_FLAG_OPTVERR) \
740 { \
741 CLEAR_BIT(FLASH->OBR, FLASH_OBR_OPTERR); \
742 } \
743 else { \
744 /* Clear Flag in Bank1 */ \
745 FLASH->SR = (__FLAG__); \
746 } \
747 } while(0)
748
749 #endif
750
751 /**
752 * @}
753 */
754
755 /**
756 * @}
757 */
758
759 /* Exported functions --------------------------------------------------------*/
760 /** @addtogroup FLASHEx_Exported_Functions
761 * @{
762 */
763
764 /** @addtogroup FLASHEx_Exported_Functions_Group1
765 * @{
766 */
767 /* IO operation functions *****************************************************/
768 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError);
769 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
770
771 /**
772 * @}
773 */
774
775 /** @addtogroup FLASHEx_Exported_Functions_Group2
776 * @{
777 */
778 /* Peripheral Control functions ***********************************************/
779 HAL_StatusTypeDef HAL_FLASHEx_OBErase(void);
780 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
781 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
782 uint32_t HAL_FLASHEx_OBGetUserData(uint32_t DATAAdress);
783 /**
784 * @}
785 */
786
787 /**
788 * @}
789 */
790
791 /**
792 * @}
793 */
794
795 /**
796 * @}
797 */
798 #ifdef __cplusplus
799 }
800 #endif
801
802 #endif /* __STM32F1xx_HAL_FLASH_EX_H */
803
804 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/