Mercurial > pub > halpp
comparison f103c8/Src/stm32f1xx_hal_msp.c @ 2:0c59e7a7782a
Working on GPIO and RCC
author | cin |
---|---|
date | Mon, 16 Jan 2017 11:04:47 +0300 |
parents | |
children |
comparison
equal
deleted
inserted
replaced
1:a0b14b11ad9f | 2:0c59e7a7782a |
---|---|
1 /** | |
2 ****************************************************************************** | |
3 * File Name : stm32f1xx_hal_msp.c | |
4 * Description : This file provides code for the MSP Initialization | |
5 * and de-Initialization codes. | |
6 ****************************************************************************** | |
7 * | |
8 * COPYRIGHT(c) 2017 STMicroelectronics | |
9 * | |
10 * Redistribution and use in source and binary forms, with or without modification, | |
11 * are permitted provided that the following conditions are met: | |
12 * 1. Redistributions of source code must retain the above copyright notice, | |
13 * this list of conditions and the following disclaimer. | |
14 * 2. Redistributions in binary form must reproduce the above copyright notice, | |
15 * this list of conditions and the following disclaimer in the documentation | |
16 * and/or other materials provided with the distribution. | |
17 * 3. Neither the name of STMicroelectronics nor the names of its contributors | |
18 * may be used to endorse or promote products derived from this software | |
19 * without specific prior written permission. | |
20 * | |
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | |
24 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE | |
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | |
27 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
28 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
31 * | |
32 ****************************************************************************** | |
33 */ | |
34 /* Includes ------------------------------------------------------------------*/ | |
35 #include "stm32f1xx_hal.h" | |
36 | |
37 extern void Error_Handler(void); | |
38 /* USER CODE BEGIN 0 */ | |
39 | |
40 /* USER CODE END 0 */ | |
41 /** | |
42 * Initializes the Global MSP. | |
43 */ | |
44 void HAL_MspInit(void) | |
45 { | |
46 /* USER CODE BEGIN MspInit 0 */ | |
47 | |
48 /* USER CODE END MspInit 0 */ | |
49 | |
50 __HAL_RCC_AFIO_CLK_ENABLE(); | |
51 | |
52 HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); | |
53 | |
54 /* System interrupt init*/ | |
55 /* MemoryManagement_IRQn interrupt configuration */ | |
56 HAL_NVIC_SetPriority(MemoryManagement_IRQn, 0, 0); | |
57 /* BusFault_IRQn interrupt configuration */ | |
58 HAL_NVIC_SetPriority(BusFault_IRQn, 0, 0); | |
59 /* UsageFault_IRQn interrupt configuration */ | |
60 HAL_NVIC_SetPriority(UsageFault_IRQn, 0, 0); | |
61 /* SVCall_IRQn interrupt configuration */ | |
62 HAL_NVIC_SetPriority(SVCall_IRQn, 0, 0); | |
63 /* DebugMonitor_IRQn interrupt configuration */ | |
64 HAL_NVIC_SetPriority(DebugMonitor_IRQn, 0, 0); | |
65 /* PendSV_IRQn interrupt configuration */ | |
66 HAL_NVIC_SetPriority(PendSV_IRQn, 0, 0); | |
67 /* SysTick_IRQn interrupt configuration */ | |
68 HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); | |
69 | |
70 /**DISABLE: JTAG-DP Disabled and SW-DP Disabled | |
71 */ | |
72 __HAL_AFIO_REMAP_SWJ_DISABLE(); | |
73 | |
74 /* USER CODE BEGIN MspInit 1 */ | |
75 | |
76 /* USER CODE END MspInit 1 */ | |
77 } | |
78 | |
79 void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) | |
80 { | |
81 | |
82 if(htim_base->Instance==TIM4) | |
83 { | |
84 /* USER CODE BEGIN TIM4_MspInit 0 */ | |
85 | |
86 /* USER CODE END TIM4_MspInit 0 */ | |
87 /* Peripheral clock enable */ | |
88 __HAL_RCC_TIM4_CLK_ENABLE(); | |
89 /* USER CODE BEGIN TIM4_MspInit 1 */ | |
90 | |
91 /* USER CODE END TIM4_MspInit 1 */ | |
92 } | |
93 | |
94 } | |
95 | |
96 void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) | |
97 { | |
98 | |
99 GPIO_InitTypeDef GPIO_InitStruct; | |
100 if(htim->Instance==TIM4) | |
101 { | |
102 /* USER CODE BEGIN TIM4_MspPostInit 0 */ | |
103 | |
104 /* USER CODE END TIM4_MspPostInit 0 */ | |
105 | |
106 /**TIM4 GPIO Configuration | |
107 PB6 ------> TIM4_CH1 | |
108 */ | |
109 GPIO_InitStruct.Pin = GPIO_PIN_6; | |
110 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | |
111 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; | |
112 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); | |
113 | |
114 /* USER CODE BEGIN TIM4_MspPostInit 1 */ | |
115 | |
116 /* USER CODE END TIM4_MspPostInit 1 */ | |
117 } | |
118 | |
119 } | |
120 | |
121 void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base) | |
122 { | |
123 | |
124 if(htim_base->Instance==TIM4) | |
125 { | |
126 /* USER CODE BEGIN TIM4_MspDeInit 0 */ | |
127 | |
128 /* USER CODE END TIM4_MspDeInit 0 */ | |
129 /* Peripheral clock disable */ | |
130 __HAL_RCC_TIM4_CLK_DISABLE(); | |
131 } | |
132 /* USER CODE BEGIN TIM4_MspDeInit 1 */ | |
133 | |
134 /* USER CODE END TIM4_MspDeInit 1 */ | |
135 | |
136 } | |
137 | |
138 /* USER CODE BEGIN 1 */ | |
139 | |
140 /* USER CODE END 1 */ | |
141 | |
142 /** | |
143 * @} | |
144 */ | |
145 | |
146 /** | |
147 * @} | |
148 */ | |
149 | |
150 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |