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a rough draft of Hardware Abstraction Layer for C++ STM32L476RG drivers
author cin
date Thu, 12 Jan 2017 02:45:43 +0300
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1 /**
2 ******************************************************************************
3 * @file stm32l4xx_hal.c
4 * @author MCD Application Team
5 * @version V1.6.0
6 * @date 28-October-2016
7 * @brief HAL module driver.
8 * This is the common part of the HAL initialization
9 *
10 @verbatim
11 ==============================================================================
12 ##### How to use this driver #####
13 ==============================================================================
14 [..]
15 The common HAL driver contains a set of generic and common APIs that can be
16 used by the PPP peripheral drivers and the user to start using the HAL.
17 [..]
18 The HAL contains two APIs' categories:
19 (+) Common HAL APIs
20 (+) Services HAL APIs
21
22 @endverbatim
23 ******************************************************************************
24 * @attention
25 *
26 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
27 *
28 * Redistribution and use in source and binary forms, with or without modification,
29 * are permitted provided that the following conditions are met:
30 * 1. Redistributions of source code must retain the above copyright notice,
31 * this list of conditions and the following disclaimer.
32 * 2. Redistributions in binary form must reproduce the above copyright notice,
33 * this list of conditions and the following disclaimer in the documentation
34 * and/or other materials provided with the distribution.
35 * 3. Neither the name of STMicroelectronics nor the names of its contributors
36 * may be used to endorse or promote products derived from this software
37 * without specific prior written permission.
38 *
39 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
40 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
41 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
42 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
43 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
44 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
45 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
46 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
47 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
48 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
49 *
50 ******************************************************************************
51 */
52
53 /* Includes ------------------------------------------------------------------*/
54 #include "stm32l4xx_hal.h"
55
56 /** @addtogroup STM32L4xx_HAL_Driver
57 * @{
58 */
59
60 /** @defgroup HAL HAL
61 * @brief HAL module driver
62 * @{
63 */
64
65 #ifdef HAL_MODULE_ENABLED
66
67 /* Private typedef -----------------------------------------------------------*/
68 /* Private define ------------------------------------------------------------*/
69 /**
70 * @brief STM32L4xx HAL Driver version number V1.6.0
71 */
72 #define __STM32L4xx_HAL_VERSION_MAIN (0x01) /*!< [31:24] main version */
73 #define __STM32L4xx_HAL_VERSION_SUB1 (0x06) /*!< [23:16] sub1 version */
74 #define __STM32L4xx_HAL_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
75 #define __STM32L4xx_HAL_VERSION_RC (0x00) /*!< [7:0] release candidate */
76 #define __STM32L4xx_HAL_VERSION ((__STM32L4xx_HAL_VERSION_MAIN << 24)\
77 |(__STM32L4xx_HAL_VERSION_SUB1 << 16)\
78 |(__STM32L4xx_HAL_VERSION_SUB2 << 8 )\
79 |(__STM32L4xx_HAL_VERSION_RC))
80
81 #if defined(VREFBUF)
82 #define VREFBUF_TIMEOUT_VALUE (uint32_t)10 /* 10 ms (to be confirmed) */
83 #endif /* VREFBUF */
84
85 /* ------------ SYSCFG registers bit address in the alias region ------------ */
86 #define SYSCFG_OFFSET (SYSCFG_BASE - PERIPH_BASE)
87 /* --- MEMRMP Register ---*/
88 /* Alias word address of FB_MODE bit */
89 #define MEMRMP_OFFSET SYSCFG_OFFSET
90 #define FB_MODE_BitNumber ((uint8_t)0x8)
91 #define FB_MODE_BB (PERIPH_BB_BASE + (MEMRMP_OFFSET * 32) + (FB_MODE_BitNumber * 4))
92
93 /* --- SCSR Register ---*/
94 /* Alias word address of SRAM2ER bit */
95 #define SCSR_OFFSET (SYSCFG_OFFSET + 0x18)
96 #define BRER_BitNumber ((uint8_t)0x0)
97 #define SCSR_SRAM2ER_BB (PERIPH_BB_BASE + (SCSR_OFFSET * 32) + (BRER_BitNumber * 4))
98
99 /* Private macro -------------------------------------------------------------*/
100 /* Private variables ---------------------------------------------------------*/
101 __IO uint32_t uwTick;
102
103 /* Private function prototypes -----------------------------------------------*/
104 /* Exported functions --------------------------------------------------------*/
105
106 /** @defgroup HAL_Exported_Functions HAL Exported Functions
107 * @{
108 */
109
110 /** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization Functions
111 * @brief Initialization and de-initialization functions
112 *
113 @verbatim
114 ===============================================================================
115 ##### Initialization and de-initialization functions #####
116 ===============================================================================
117 [..] This section provides functions allowing to:
118 (+) Initialize the Flash interface the NVIC allocation and initial time base
119 clock configuration.
120 (+) De-initialize common part of the HAL.
121 (+) Configure the time base source to have 1ms time base with a dedicated
122 Tick interrupt priority.
123 (++) SysTick timer is used by default as source of time base, but user
124 can eventually implement his proper time base source (a general purpose
125 timer for example or other time source), keeping in mind that Time base
126 duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
127 handled in milliseconds basis.
128 (++) Time base configuration function (HAL_InitTick ()) is called automatically
129 at the beginning of the program after reset by HAL_Init() or at any time
130 when clock is configured, by HAL_RCC_ClockConfig().
131 (++) Source of time base is configured to generate interrupts at regular
132 time intervals. Care must be taken if HAL_Delay() is called from a
133 peripheral ISR process, the Tick interrupt line must have higher priority
134 (numerically lower) than the peripheral interrupt. Otherwise the caller
135 ISR process will be blocked.
136 (++) functions affecting time base configurations are declared as __weak
137 to make override possible in case of other implementations in user file.
138 @endverbatim
139 * @{
140 */
141
142 /**
143 * @brief Configure the Flash prefetch, the Instruction and Data caches,
144 * the time base source, NVIC and any required global low level hardware
145 * by calling the HAL_MspInit() callback function to be optionally defined in user file
146 * stm32l4xx_hal_msp.c.
147 *
148 * @note HAL_Init() function is called at the beginning of program after reset and before
149 * the clock configuration.
150 *
151 * @note In the default implementation the System Timer (Systick) is used as source of time base.
152 * The Systick configuration is based on MSI clock, as MSI is the clock
153 * used after a system Reset and the NVIC configuration is set to Priority group 4.
154 * Once done, time base tick starts incrementing: the tick variable counter is incremented
155 * each 1ms in the SysTick_Handler() interrupt handler.
156 *
157 * @retval HAL status
158 */
159 HAL_StatusTypeDef HAL_Init(void)
160 {
161 /* Configure Flash prefetch, Instruction cache, Data cache */
162 /* Default configuration at reset is: */
163 /* - Prefetch disabled */
164 /* - Instruction cache enabled */
165 /* - Data cache enabled */
166 #if (INSTRUCTION_CACHE_ENABLE == 0)
167 __HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
168 #endif /* INSTRUCTION_CACHE_ENABLE */
169
170 #if (DATA_CACHE_ENABLE == 0)
171 __HAL_FLASH_DATA_CACHE_DISABLE();
172 #endif /* DATA_CACHE_ENABLE */
173
174 #if (PREFETCH_ENABLE != 0)
175 __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
176 #endif /* PREFETCH_ENABLE */
177
178 /* Set Interrupt Group Priority */
179 HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
180
181 /* Use SysTick as time base source and configure 1ms tick (default clock after Reset is MSI) */
182 HAL_InitTick(TICK_INT_PRIORITY);
183
184 /* Init the low level hardware */
185 HAL_MspInit();
186
187 /* Return function status */
188 return HAL_OK;
189 }
190
191 /**
192 * @brief De-initialize common part of the HAL and stop the source of time base.
193 * @note This function is optional.
194 * @retval HAL status
195 */
196 HAL_StatusTypeDef HAL_DeInit(void)
197 {
198 /* Reset of all peripherals */
199 __HAL_RCC_APB1_FORCE_RESET();
200 __HAL_RCC_APB1_RELEASE_RESET();
201
202 __HAL_RCC_APB2_FORCE_RESET();
203 __HAL_RCC_APB2_RELEASE_RESET();
204
205 __HAL_RCC_AHB1_FORCE_RESET();
206 __HAL_RCC_AHB1_RELEASE_RESET();
207
208 __HAL_RCC_AHB2_FORCE_RESET();
209 __HAL_RCC_AHB2_RELEASE_RESET();
210
211 __HAL_RCC_AHB3_FORCE_RESET();
212 __HAL_RCC_AHB3_RELEASE_RESET();
213
214 /* De-Init the low level hardware */
215 HAL_MspDeInit();
216
217 /* Return function status */
218 return HAL_OK;
219 }
220
221 /**
222 * @brief Initialize the MSP.
223 * @retval None
224 */
225 __weak void HAL_MspInit(void)
226 {
227 /* NOTE : This function should not be modified, when the callback is needed,
228 the HAL_MspInit could be implemented in the user file
229 */
230 }
231
232 /**
233 * @brief DeInitialize the MSP.
234 * @retval None
235 */
236 __weak void HAL_MspDeInit(void)
237 {
238 /* NOTE : This function should not be modified, when the callback is needed,
239 the HAL_MspDeInit could be implemented in the user file
240 */
241 }
242
243 /**
244 * @brief This function configures the source of the time base:
245 * The time source is configured to have 1ms time base with a dedicated
246 * Tick interrupt priority.
247 * @note This function is called automatically at the beginning of program after
248 * reset by HAL_Init() or at any time when clock is reconfigured by HAL_RCC_ClockConfig().
249 * @note In the default implementation, SysTick timer is the source of time base.
250 * It is used to generate interrupts at regular time intervals.
251 * Care must be taken if HAL_Delay() is called from a peripheral ISR process,
252 * The SysTick interrupt must have higher priority (numerically lower)
253 * than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
254 * The function is declared as __weak to be overwritten in case of other
255 * implementation in user file.
256 * @param TickPriority: Tick interrupt priority.
257 * @retval HAL status
258 */
259 __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
260 {
261 /*Configure the SysTick to have interrupt in 1ms time basis*/
262 HAL_SYSTICK_Config(SystemCoreClock/1000);
263
264 /*Configure the SysTick IRQ priority */
265 HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority ,0);
266
267 /* Return function status */
268 return HAL_OK;
269 }
270
271 /**
272 * @}
273 */
274
275 /** @defgroup HAL_Exported_Functions_Group2 HAL Control functions
276 * @brief HAL Control functions
277 *
278 @verbatim
279 ===============================================================================
280 ##### HAL Control functions #####
281 ===============================================================================
282 [..] This section provides functions allowing to:
283 (+) Provide a tick value in millisecond
284 (+) Provide a blocking delay in millisecond
285 (+) Suspend the time base source interrupt
286 (+) Resume the time base source interrupt
287 (+) Get the HAL API driver version
288 (+) Get the device identifier
289 (+) Get the device revision identifier
290
291 @endverbatim
292 * @{
293 */
294
295 /**
296 * @brief This function is called to increment a global variable "uwTick"
297 * used as application time base.
298 * @note In the default implementation, this variable is incremented each 1ms
299 * in SysTick ISR.
300 * @note This function is declared as __weak to be overwritten in case of other
301 * implementations in user file.
302 * @retval None
303 */
304 __weak void HAL_IncTick(void)
305 {
306 uwTick++;
307 }
308
309 /**
310 * @brief Provide a tick value in millisecond.
311 * @note This function is declared as __weak to be overwritten in case of other
312 * implementations in user file.
313 * @retval tick value
314 */
315 __weak uint32_t HAL_GetTick(void)
316 {
317 return uwTick;
318 }
319
320 /**
321 * @brief Provide accurate delay (in milliseconds) based on variable incremented.
322 * @note In the default implementation , SysTick timer is the source of time base.
323 * It is used to generate interrupts at regular time intervals where uwTick
324 * is incremented.
325 * @note This function is declared as __weak to be overwritten in case of other
326 * implementations in user file.
327 * @param Delay: specifies the delay time length, in milliseconds.
328 * @retval None
329 */
330 __weak void HAL_Delay(uint32_t Delay)
331 {
332 uint32_t tickstart = 0;
333 tickstart = HAL_GetTick();
334 while((HAL_GetTick() - tickstart) < Delay)
335 {
336 }
337 }
338
339 /**
340 * @brief Suspend Tick increment.
341 * @note In the default implementation , SysTick timer is the source of time base. It is
342 * used to generate interrupts at regular time intervals. Once HAL_SuspendTick()
343 * is called, the SysTick interrupt will be disabled and so Tick increment
344 * is suspended.
345 * @note This function is declared as __weak to be overwritten in case of other
346 * implementations in user file.
347 * @retval None
348 */
349 __weak void HAL_SuspendTick(void)
350 {
351 /* Disable SysTick Interrupt */
352 SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
353 }
354
355 /**
356 * @brief Resume Tick increment.
357 * @note In the default implementation , SysTick timer is the source of time base. It is
358 * used to generate interrupts at regular time intervals. Once HAL_ResumeTick()
359 * is called, the SysTick interrupt will be enabled and so Tick increment
360 * is resumed.
361 * @note This function is declared as __weak to be overwritten in case of other
362 * implementations in user file.
363 * @retval None
364 */
365 __weak void HAL_ResumeTick(void)
366 {
367 /* Enable SysTick Interrupt */
368 SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk;
369 }
370
371 /**
372 * @brief Return the HAL revision.
373 * @retval version : 0xXYZR (8bits for each decimal, R for RC)
374 */
375 uint32_t HAL_GetHalVersion(void)
376 {
377 return __STM32L4xx_HAL_VERSION;
378 }
379
380 /**
381 * @brief Return the device revision identifier.
382 * @retval Device revision identifier
383 */
384 uint32_t HAL_GetREVID(void)
385 {
386 return((DBGMCU->IDCODE & DBGMCU_IDCODE_REV_ID) >> 16);
387 }
388
389 /**
390 * @brief Return the device identifier.
391 * @retval Device identifier
392 */
393 uint32_t HAL_GetDEVID(void)
394 {
395 return(DBGMCU->IDCODE & DBGMCU_IDCODE_DEV_ID);
396 }
397
398 /**
399 * @}
400 */
401
402 /** @defgroup HAL_Exported_Functions_Group3 HAL Debug functions
403 * @brief HAL Debug functions
404 *
405 @verbatim
406 ===============================================================================
407 ##### HAL Debug functions #####
408 ===============================================================================
409 [..] This section provides functions allowing to:
410 (+) Enable/Disable Debug module during SLEEP mode
411 (+) Enable/Disable Debug module during STOP0/STOP1/STOP2 modes
412 (+) Enable/Disable Debug module during STANDBY mode
413
414 @endverbatim
415 * @{
416 */
417
418 /**
419 * @brief Enable the Debug Module during SLEEP mode.
420 * @retval None
421 */
422 void HAL_DBGMCU_EnableDBGSleepMode(void)
423 {
424 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
425 }
426
427 /**
428 * @brief Disable the Debug Module during SLEEP mode.
429 * @retval None
430 */
431 void HAL_DBGMCU_DisableDBGSleepMode(void)
432 {
433 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
434 }
435
436 /**
437 * @brief Enable the Debug Module during STOP0/STOP1/STOP2 modes.
438 * @retval None
439 */
440 void HAL_DBGMCU_EnableDBGStopMode(void)
441 {
442 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
443 }
444
445 /**
446 * @brief Disable the Debug Module during STOP0/STOP1/STOP2 modes.
447 * @retval None
448 */
449 void HAL_DBGMCU_DisableDBGStopMode(void)
450 {
451 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
452 }
453
454 /**
455 * @brief Enable the Debug Module during STANDBY mode.
456 * @retval None
457 */
458 void HAL_DBGMCU_EnableDBGStandbyMode(void)
459 {
460 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
461 }
462
463 /**
464 * @brief Disable the Debug Module during STANDBY mode.
465 * @retval None
466 */
467 void HAL_DBGMCU_DisableDBGStandbyMode(void)
468 {
469 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
470 }
471
472 /**
473 * @}
474 */
475
476 /** @defgroup HAL_Exported_Functions_Group4 HAL SYSCFG configuration functions
477 * @brief HAL SYSCFG configuration functions
478 *
479 @verbatim
480 ===============================================================================
481 ##### HAL SYSCFG configuration functions #####
482 ===============================================================================
483 [..] This section provides functions allowing to:
484 (+) Start a hardware SRAM2 erase operation
485 (+) Enable/Disable the Internal FLASH Bank Swapping
486 (+) Configure the Voltage reference buffer
487 (+) Enable/Disable the Voltage reference buffer
488 (+) Enable/Disable the I/O analog switch voltage booster
489
490 @endverbatim
491 * @{
492 */
493
494 /**
495 * @brief Start a hardware SRAM2 erase operation.
496 * @note As long as SRAM2 is not erased the SRAM2ER bit will be set.
497 * This bit is automatically reset at the end of the SRAM2 erase operation.
498 * @retval None
499 */
500 void HAL_SYSCFG_SRAM2Erase(void)
501 {
502 /* unlock the write protection of the SRAM2ER bit */
503 SYSCFG->SKR = 0xCA;
504 SYSCFG->SKR = 0x53;
505 /* Starts a hardware SRAM2 erase operation*/
506 *(__IO uint32_t *) SCSR_SRAM2ER_BB = (uint8_t)0x00000001;
507 }
508
509 /**
510 * @brief Enable the Internal FLASH Bank Swapping.
511 *
512 * @note This function can be used only for STM32L4xx devices.
513 *
514 * @note Flash Bank2 mapped at 0x08000000 (and aliased @0x00000000)
515 * and Flash Bank1 mapped at 0x08100000 (and aliased at 0x00100000)
516 *
517 * @retval None
518 */
519 void HAL_SYSCFG_EnableMemorySwappingBank(void)
520 {
521 *(__IO uint32_t *)FB_MODE_BB = (uint32_t)ENABLE;
522 }
523
524 /**
525 * @brief Disable the Internal FLASH Bank Swapping.
526 *
527 * @note This function can be used only for STM32L4xx devices.
528 *
529 * @note The default state : Flash Bank1 mapped at 0x08000000 (and aliased @0x0000 0000)
530 * and Flash Bank2 mapped at 0x08100000 (and aliased at 0x00100000)
531 *
532 * @retval None
533 */
534 void HAL_SYSCFG_DisableMemorySwappingBank(void)
535 {
536
537 *(__IO uint32_t *)FB_MODE_BB = (uint32_t)DISABLE;
538 }
539
540 #if defined(VREFBUF)
541 /**
542 * @brief Configure the internal voltage reference buffer voltage scale.
543 * @param VoltageScaling: specifies the output voltage to achieve
544 * This parameter can be one of the following values:
545 * @arg SYSCFG_VREFBUF_VOLTAGE_SCALE0: VREF_OUT1 around 2.048 V.
546 * This requires VDDA equal to or higher than 2.4 V.
547 * @arg SYSCFG_VREFBUF_VOLTAGE_SCALE1: VREF_OUT1 around 2.5 V.
548 * This requires VDDA equal to or higher than 2.8 V.
549 * @retval None
550 */
551 void HAL_SYSCFG_VREFBUF_VoltageScalingConfig(uint32_t VoltageScaling)
552 {
553 /* Check the parameters */
554 assert_param(IS_SYSCFG_VREFBUF_VOLTAGE_SCALE(VoltageScaling));
555
556 MODIFY_REG(VREFBUF->CSR, VREFBUF_CSR_VRS, VoltageScaling);
557 }
558
559 /**
560 * @brief Configure the internal voltage reference buffer high impedance mode.
561 * @param Mode: specifies the high impedance mode
562 * This parameter can be one of the following values:
563 * @arg SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE: VREF+ pin is internally connect to VREFINT output.
564 * @arg SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE: VREF+ pin is high impedance.
565 * @retval None
566 */
567 void HAL_SYSCFG_VREFBUF_HighImpedanceConfig(uint32_t Mode)
568 {
569 /* Check the parameters */
570 assert_param(IS_SYSCFG_VREFBUF_HIGH_IMPEDANCE(Mode));
571
572 MODIFY_REG(VREFBUF->CSR, VREFBUF_CSR_HIZ, Mode);
573 }
574
575 /**
576 * @brief Tune the Internal Voltage Reference buffer (VREFBUF).
577 * @retval None
578 */
579 void HAL_SYSCFG_VREFBUF_TrimmingConfig(uint32_t TrimmingValue)
580 {
581 /* Check the parameters */
582 assert_param(IS_SYSCFG_VREFBUF_TRIMMING(TrimmingValue));
583
584 MODIFY_REG(VREFBUF->CCR, VREFBUF_CCR_TRIM, TrimmingValue);
585 }
586
587 /**
588 * @brief Enable the Internal Voltage Reference buffer (VREFBUF).
589 * @retval HAL_OK/HAL_TIMEOUT
590 */
591 HAL_StatusTypeDef HAL_SYSCFG_EnableVREFBUF(void)
592 {
593 uint32_t tickstart = 0;
594
595 SET_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR);
596
597 /* Get Start Tick*/
598 tickstart = HAL_GetTick();
599
600 /* Wait for VRR bit */
601 while(READ_BIT(VREFBUF->CSR, VREFBUF_CSR_VRR) == RESET)
602 {
603 if((HAL_GetTick() - tickstart) > VREFBUF_TIMEOUT_VALUE)
604 {
605 return HAL_TIMEOUT;
606 }
607 }
608
609 return HAL_OK;
610 }
611
612 /**
613 * @brief Disable the Internal Voltage Reference buffer (VREFBUF).
614 *
615 * @retval None
616 */
617 void HAL_SYSCFG_DisableVREFBUF(void)
618 {
619 CLEAR_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR);
620 }
621 #endif /* VREFBUF */
622
623 /**
624 * @brief Enable the I/O analog switch voltage booster
625 *
626 * @retval None
627 */
628 void HAL_SYSCFG_EnableIOAnalogSwitchBooster(void)
629 {
630 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN);
631 }
632
633 /**
634 * @brief Disable the I/O analog switch voltage booster
635 *
636 * @retval None
637 */
638 void HAL_SYSCFG_DisableIOAnalogSwitchBooster(void)
639 {
640 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN);
641 }
642
643 /**
644 * @}
645 */
646
647 /**
648 * @}
649 */
650
651 #endif /* HAL_MODULE_ENABLED */
652 /**
653 * @}
654 */
655
656 /**
657 * @}
658 */
659
660 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/