Mercurial > pub > halpp
comparison l476rg/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c @ 0:32a3b1785697
a rough draft of Hardware Abstraction Layer for C++
STM32L476RG drivers
| author | cin |
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| date | Thu, 12 Jan 2017 02:45:43 +0300 |
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| -1:000000000000 | 0:32a3b1785697 |
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| 1 /** | |
| 2 ****************************************************************************** | |
| 3 * @file stm32l4xx_hal_gpio.c | |
| 4 * @author MCD Application Team | |
| 5 * @version V1.6.0 | |
| 6 * @date 28-October-2016 | |
| 7 * @brief GPIO HAL module driver. | |
| 8 * This file provides firmware functions to manage the following | |
| 9 * functionalities of the General Purpose Input/Output (GPIO) peripheral: | |
| 10 * + Initialization and de-initialization functions | |
| 11 * + IO operation functions | |
| 12 * | |
| 13 @verbatim | |
| 14 ============================================================================== | |
| 15 ##### GPIO Peripheral features ##### | |
| 16 ============================================================================== | |
| 17 [..] | |
| 18 (+) Each port bit of the general-purpose I/O (GPIO) ports can be individually | |
| 19 configured by software in several modes: | |
| 20 (++) Input mode | |
| 21 (++) Analog mode | |
| 22 (++) Output mode | |
| 23 (++) Alternate function mode | |
| 24 (++) External interrupt/event lines | |
| 25 | |
| 26 (+) During and just after reset, the alternate functions and external interrupt | |
| 27 lines are not active and the I/O ports are configured in input floating mode. | |
| 28 | |
| 29 (+) All GPIO pins have weak internal pull-up and pull-down resistors, which can be | |
| 30 activated or not. | |
| 31 | |
| 32 (+) In Output or Alternate mode, each IO can be configured on open-drain or push-pull | |
| 33 type and the IO speed can be selected depending on the VDD value. | |
| 34 | |
| 35 (+) The microcontroller IO pins are connected to onboard peripherals/modules through a | |
| 36 multiplexer that allows only one peripheral alternate function (AF) connected | |
| 37 to an IO pin at a time. In this way, there can be no conflict between peripherals | |
| 38 sharing the same IO pin. | |
| 39 | |
| 40 (+) All ports have external interrupt/event capability. To use external interrupt | |
| 41 lines, the port must be configured in input mode. All available GPIO pins are | |
| 42 connected to the 16 external interrupt/event lines from EXTI0 to EXTI15. | |
| 43 | |
| 44 (+) The external interrupt/event controller consists of up to 39 edge detectors | |
| 45 (16 lines are connected to GPIO) for generating event/interrupt requests (each | |
| 46 input line can be independently configured to select the type (interrupt or event) | |
| 47 and the corresponding trigger event (rising or falling or both). Each line can | |
| 48 also be masked independently. | |
| 49 | |
| 50 ##### How to use this driver ##### | |
| 51 ============================================================================== | |
| 52 [..] | |
| 53 (#) Enable the GPIO AHB clock using the following function: __HAL_RCC_GPIOx_CLK_ENABLE(). | |
| 54 | |
| 55 (#) Configure the GPIO pin(s) using HAL_GPIO_Init(). | |
| 56 (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure | |
| 57 (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef | |
| 58 structure. | |
| 59 (++) In case of Output or alternate function mode selection: the speed is | |
| 60 configured through "Speed" member from GPIO_InitTypeDef structure. | |
| 61 (++) In alternate mode is selection, the alternate function connected to the IO | |
| 62 is configured through "Alternate" member from GPIO_InitTypeDef structure. | |
| 63 (++) Analog mode is required when a pin is to be used as ADC channel | |
| 64 or DAC output. | |
| 65 (++) In case of external interrupt/event selection the "Mode" member from | |
| 66 GPIO_InitTypeDef structure select the type (interrupt or event) and | |
| 67 the corresponding trigger event (rising or falling or both). | |
| 68 | |
| 69 (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority | |
| 70 mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using | |
| 71 HAL_NVIC_EnableIRQ(). | |
| 72 | |
| 73 (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin(). | |
| 74 | |
| 75 (#) To set/reset the level of a pin configured in output mode use | |
| 76 HAL_GPIO_WritePin()/HAL_GPIO_TogglePin(). | |
| 77 | |
| 78 (#) To lock pin configuration until next reset use HAL_GPIO_LockPin(). | |
| 79 | |
| 80 (#) During and just after reset, the alternate functions are not | |
| 81 active and the GPIO pins are configured in input floating mode (except JTAG | |
| 82 pins). | |
| 83 | |
| 84 (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose | |
| 85 (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has | |
| 86 priority over the GPIO function. | |
| 87 | |
| 88 (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as | |
| 89 general purpose PH0 and PH1, respectively, when the HSE oscillator is off. | |
| 90 The HSE has priority over the GPIO function. | |
| 91 | |
| 92 @endverbatim | |
| 93 ****************************************************************************** | |
| 94 * @attention | |
| 95 * | |
| 96 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> | |
| 97 * | |
| 98 * Redistribution and use in source and binary forms, with or without modification, | |
| 99 * are permitted provided that the following conditions are met: | |
| 100 * 1. Redistributions of source code must retain the above copyright notice, | |
| 101 * this list of conditions and the following disclaimer. | |
| 102 * 2. Redistributions in binary form must reproduce the above copyright notice, | |
| 103 * this list of conditions and the following disclaimer in the documentation | |
| 104 * and/or other materials provided with the distribution. | |
| 105 * 3. Neither the name of STMicroelectronics nor the names of its contributors | |
| 106 * may be used to endorse or promote products derived from this software | |
| 107 * without specific prior written permission. | |
| 108 * | |
| 109 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| 110 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
| 111 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | |
| 112 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE | |
| 113 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
| 114 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | |
| 115 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
| 116 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
| 117 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
| 118 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 119 * | |
| 120 ****************************************************************************** | |
| 121 */ | |
| 122 | |
| 123 /* Includes ------------------------------------------------------------------*/ | |
| 124 #include "stm32l4xx_hal.h" | |
| 125 | |
| 126 /** @addtogroup STM32L4xx_HAL_Driver | |
| 127 * @{ | |
| 128 */ | |
| 129 | |
| 130 /** @defgroup GPIO GPIO | |
| 131 * @brief GPIO HAL module driver | |
| 132 * @{ | |
| 133 */ | |
| 134 | |
| 135 #ifdef HAL_GPIO_MODULE_ENABLED | |
| 136 | |
| 137 /* Private typedef -----------------------------------------------------------*/ | |
| 138 /* Private defines -----------------------------------------------------------*/ | |
| 139 /** @defgroup GPIO_Private_Defines GPIO Private Defines | |
| 140 * @{ | |
| 141 */ | |
| 142 #define GPIO_MODE ((uint32_t)0x00000003) | |
| 143 #define ANALOG_MODE ((uint32_t)0x00000008) | |
| 144 #define EXTI_MODE ((uint32_t)0x10000000) | |
| 145 #define GPIO_MODE_IT ((uint32_t)0x00010000) | |
| 146 #define GPIO_MODE_EVT ((uint32_t)0x00020000) | |
| 147 #define RISING_EDGE ((uint32_t)0x00100000) | |
| 148 #define FALLING_EDGE ((uint32_t)0x00200000) | |
| 149 #define GPIO_OUTPUT_TYPE ((uint32_t)0x00000010) | |
| 150 | |
| 151 #define GPIO_NUMBER ((uint32_t)16) | |
| 152 /** | |
| 153 * @} | |
| 154 */ | |
| 155 | |
| 156 /* Private macros ------------------------------------------------------------*/ | |
| 157 /* Private macros ------------------------------------------------------------*/ | |
| 158 /** @defgroup GPIO_Private_Macros GPIO Private Macros | |
| 159 * @{ | |
| 160 */ | |
| 161 /** | |
| 162 * @} | |
| 163 */ | |
| 164 /* Private variables ---------------------------------------------------------*/ | |
| 165 /* Private function prototypes -----------------------------------------------*/ | |
| 166 /* Exported functions --------------------------------------------------------*/ | |
| 167 | |
| 168 /** @defgroup GPIO_Exported_Functions GPIO Exported Functions | |
| 169 * @{ | |
| 170 */ | |
| 171 | |
| 172 /** @defgroup GPIO_Exported_Functions_Group1 Initialization/de-initialization functions | |
| 173 * @brief Initialization and Configuration functions | |
| 174 * | |
| 175 @verbatim | |
| 176 =============================================================================== | |
| 177 ##### Initialization and de-initialization functions ##### | |
| 178 =============================================================================== | |
| 179 | |
| 180 @endverbatim | |
| 181 * @{ | |
| 182 */ | |
| 183 | |
| 184 /** | |
| 185 * @brief Initialize the GPIOx peripheral according to the specified parameters in the GPIO_Init. | |
| 186 * @param GPIOx: where x can be (A..H) to select the GPIO peripheral for STM32L4 family | |
| 187 * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains | |
| 188 * the configuration information for the specified GPIO peripheral. | |
| 189 * @retval None | |
| 190 */ | |
| 191 void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) | |
| 192 { | |
| 193 uint32_t position = 0x00; | |
| 194 uint32_t iocurrent = 0x00; | |
| 195 uint32_t temp = 0x00; | |
| 196 | |
| 197 /* Check the parameters */ | |
| 198 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); | |
| 199 assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); | |
| 200 assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); | |
| 201 assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); | |
| 202 | |
| 203 /* Configure the port pins */ | |
| 204 while (((GPIO_Init->Pin) >> position) != RESET) | |
| 205 { | |
| 206 /* Get current io position */ | |
| 207 iocurrent = (GPIO_Init->Pin) & (1U << position); | |
| 208 | |
| 209 if(iocurrent) | |
| 210 { | |
| 211 /*--------------------- GPIO Mode Configuration ------------------------*/ | |
| 212 /* In case of Alternate function mode selection */ | |
| 213 if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) | |
| 214 { | |
| 215 /* Check the Alternate function parameters */ | |
| 216 assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); | |
| 217 assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); | |
| 218 | |
| 219 /* Configure Alternate function mapped with the current IO */ | |
| 220 temp = GPIOx->AFR[position >> 3]; | |
| 221 temp &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ; | |
| 222 temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07) * 4)); | |
| 223 GPIOx->AFR[position >> 3] = temp; | |
| 224 } | |
| 225 | |
| 226 /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ | |
| 227 temp = GPIOx->MODER; | |
| 228 temp &= ~(GPIO_MODER_MODE0 << (position * 2)); | |
| 229 temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2)); | |
| 230 GPIOx->MODER = temp; | |
| 231 | |
| 232 /* In case of Output or Alternate function mode selection */ | |
| 233 if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || | |
| 234 (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) | |
| 235 { | |
| 236 /* Check the Speed parameter */ | |
| 237 assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); | |
| 238 /* Configure the IO Speed */ | |
| 239 temp = GPIOx->OSPEEDR; | |
| 240 temp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * 2)); | |
| 241 temp |= (GPIO_Init->Speed << (position * 2)); | |
| 242 GPIOx->OSPEEDR = temp; | |
| 243 | |
| 244 /* Configure the IO Output Type */ | |
| 245 temp = GPIOx->OTYPER; | |
| 246 temp &= ~(GPIO_OTYPER_OT0 << position) ; | |
| 247 temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4) << position); | |
| 248 GPIOx->OTYPER = temp; | |
| 249 } | |
| 250 | |
| 251 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) | |
| 252 | |
| 253 /* In case of Analog mode, check if ADC control mode is selected */ | |
| 254 if((GPIO_Init->Mode & GPIO_MODE_ANALOG) == GPIO_MODE_ANALOG) | |
| 255 { | |
| 256 /* Configure the IO Output Type */ | |
| 257 temp = GPIOx->ASCR; | |
| 258 temp &= ~(GPIO_ASCR_ASC0 << position) ; | |
| 259 temp |= (((GPIO_Init->Mode & ANALOG_MODE) >> 3) << position); | |
| 260 GPIOx->ASCR = temp; | |
| 261 } | |
| 262 | |
| 263 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ | |
| 264 | |
| 265 /* Activate the Pull-up or Pull down resistor for the current IO */ | |
| 266 temp = GPIOx->PUPDR; | |
| 267 temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2)); | |
| 268 temp |= ((GPIO_Init->Pull) << (position * 2)); | |
| 269 GPIOx->PUPDR = temp; | |
| 270 | |
| 271 /*--------------------- EXTI Mode Configuration ------------------------*/ | |
| 272 /* Configure the External Interrupt or event for the current IO */ | |
| 273 if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) | |
| 274 { | |
| 275 /* Enable SYSCFG Clock */ | |
| 276 __HAL_RCC_SYSCFG_CLK_ENABLE(); | |
| 277 | |
| 278 temp = SYSCFG->EXTICR[position >> 2]; | |
| 279 temp &= ~(((uint32_t)0x0F) << (4 * (position & 0x03))); | |
| 280 temp |= (GPIO_GET_INDEX(GPIOx) << (4 * (position & 0x03))); | |
| 281 SYSCFG->EXTICR[position >> 2] = temp; | |
| 282 | |
| 283 /* Clear EXTI line configuration */ | |
| 284 temp = EXTI->IMR1; | |
| 285 temp &= ~((uint32_t)iocurrent); | |
| 286 if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) | |
| 287 { | |
| 288 temp |= iocurrent; | |
| 289 } | |
| 290 EXTI->IMR1 = temp; | |
| 291 | |
| 292 temp = EXTI->EMR1; | |
| 293 temp &= ~((uint32_t)iocurrent); | |
| 294 if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) | |
| 295 { | |
| 296 temp |= iocurrent; | |
| 297 } | |
| 298 EXTI->EMR1 = temp; | |
| 299 | |
| 300 /* Clear Rising Falling edge configuration */ | |
| 301 temp = EXTI->RTSR1; | |
| 302 temp &= ~((uint32_t)iocurrent); | |
| 303 if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) | |
| 304 { | |
| 305 temp |= iocurrent; | |
| 306 } | |
| 307 EXTI->RTSR1 = temp; | |
| 308 | |
| 309 temp = EXTI->FTSR1; | |
| 310 temp &= ~((uint32_t)iocurrent); | |
| 311 if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) | |
| 312 { | |
| 313 temp |= iocurrent; | |
| 314 } | |
| 315 EXTI->FTSR1 = temp; | |
| 316 } | |
| 317 } | |
| 318 | |
| 319 position++; | |
| 320 } | |
| 321 } | |
| 322 | |
| 323 /** | |
| 324 * @brief De-initialize the GPIOx peripheral registers to their default reset values. | |
| 325 * @param GPIOx: where x can be (A..H) to select the GPIO peripheral for STM32L4 family | |
| 326 * @param GPIO_Pin: specifies the port bit to be written. | |
| 327 * This parameter can be one of GPIO_PIN_x where x can be (0..15). | |
| 328 * @retval None | |
| 329 */ | |
| 330 void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) | |
| 331 { | |
| 332 uint32_t position = 0x00; | |
| 333 uint32_t iocurrent = 0x00; | |
| 334 uint32_t tmp = 0x00; | |
| 335 | |
| 336 /* Check the parameters */ | |
| 337 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); | |
| 338 assert_param(IS_GPIO_PIN(GPIO_Pin)); | |
| 339 | |
| 340 /* Configure the port pins */ | |
| 341 while ((GPIO_Pin >> position) != RESET) | |
| 342 { | |
| 343 /* Get current io position */ | |
| 344 iocurrent = (GPIO_Pin) & (1U << position); | |
| 345 | |
| 346 if (iocurrent) | |
| 347 { | |
| 348 /*------------------------- GPIO Mode Configuration --------------------*/ | |
| 349 /* Configure IO in Analog Mode */ | |
| 350 GPIOx->MODER |= (GPIO_MODER_MODE0 << (position * 2)); | |
| 351 | |
| 352 /* Configure the default Alternate Function in current IO */ | |
| 353 GPIOx->AFR[position >> 3] &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ; | |
| 354 | |
| 355 /* Configure the default value for IO Speed */ | |
| 356 GPIOx->OSPEEDR &= ~(GPIO_OSPEEDR_OSPEED0 << (position * 2)); | |
| 357 | |
| 358 /* Configure the default value IO Output Type */ | |
| 359 GPIOx->OTYPER &= ~(GPIO_OTYPER_OT0 << position) ; | |
| 360 | |
| 361 /* Deactivate the Pull-up and Pull-down resistor for the current IO */ | |
| 362 GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPD0 << (position * 2)); | |
| 363 | |
| 364 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) | |
| 365 | |
| 366 /* Deactivate the Control bit of Analog mode for the current IO */ | |
| 367 GPIOx->ASCR &= ~(GPIO_ASCR_ASC0<< position); | |
| 368 | |
| 369 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ | |
| 370 | |
| 371 /*------------------------- EXTI Mode Configuration --------------------*/ | |
| 372 /* Clear the External Interrupt or Event for the current IO */ | |
| 373 | |
| 374 tmp = SYSCFG->EXTICR[position >> 2]; | |
| 375 tmp &= (((uint32_t)0x0F) << (4 * (position & 0x03))); | |
| 376 if(tmp == (GPIO_GET_INDEX(GPIOx) << (4 * (position & 0x03)))) | |
| 377 { | |
| 378 tmp = ((uint32_t)0x0F) << (4 * (position & 0x03)); | |
| 379 SYSCFG->EXTICR[position >> 2] &= ~tmp; | |
| 380 | |
| 381 /* Clear EXTI line configuration */ | |
| 382 EXTI->IMR1 &= ~((uint32_t)iocurrent); | |
| 383 EXTI->EMR1 &= ~((uint32_t)iocurrent); | |
| 384 | |
| 385 /* Clear Rising Falling edge configuration */ | |
| 386 EXTI->RTSR1 &= ~((uint32_t)iocurrent); | |
| 387 EXTI->FTSR1 &= ~((uint32_t)iocurrent); | |
| 388 } | |
| 389 } | |
| 390 | |
| 391 position++; | |
| 392 } | |
| 393 } | |
| 394 | |
| 395 /** | |
| 396 * @} | |
| 397 */ | |
| 398 | |
| 399 /** @defgroup GPIO_Exported_Functions_Group2 IO operation functions | |
| 400 * @brief GPIO Read, Write, Toggle, Lock and EXTI management functions. | |
| 401 * | |
| 402 @verbatim | |
| 403 =============================================================================== | |
| 404 ##### IO operation functions ##### | |
| 405 =============================================================================== | |
| 406 | |
| 407 @endverbatim | |
| 408 * @{ | |
| 409 */ | |
| 410 | |
| 411 /** | |
| 412 * @brief Read the specified input port pin. | |
| 413 * @param GPIOx: where x can be (A..H) to select the GPIO peripheral for STM32L4 family | |
| 414 * @param GPIO_Pin: specifies the port bit to read. | |
| 415 * This parameter can be GPIO_PIN_x where x can be (0..15). | |
| 416 * @retval The input port pin value. | |
| 417 */ | |
| 418 GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) | |
| 419 { | |
| 420 GPIO_PinState bitstatus; | |
| 421 | |
| 422 /* Check the parameters */ | |
| 423 assert_param(IS_GPIO_PIN(GPIO_Pin)); | |
| 424 | |
| 425 if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) | |
| 426 { | |
| 427 bitstatus = GPIO_PIN_SET; | |
| 428 } | |
| 429 else | |
| 430 { | |
| 431 bitstatus = GPIO_PIN_RESET; | |
| 432 } | |
| 433 return bitstatus; | |
| 434 } | |
| 435 | |
| 436 /** | |
| 437 * @brief Set or clear the selected data port bit. | |
| 438 * | |
| 439 * @note This function uses GPIOx_BSRR and GPIOx_BRR registers to allow atomic read/modify | |
| 440 * accesses. In this way, there is no risk of an IRQ occurring between | |
| 441 * the read and the modify access. | |
| 442 * | |
| 443 * @param GPIOx: where x can be (A..H) to select the GPIO peripheral for STM32L4 family | |
| 444 * @param GPIO_Pin: specifies the port bit to be written. | |
| 445 * This parameter can be one of GPIO_PIN_x where x can be (0..15). | |
| 446 * @param PinState: specifies the value to be written to the selected bit. | |
| 447 * This parameter can be one of the GPIO_PinState enum values: | |
| 448 * @arg GPIO_PIN_RESET: to clear the port pin | |
| 449 * @arg GPIO_PIN_SET: to set the port pin | |
| 450 * @retval None | |
| 451 */ | |
| 452 void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) | |
| 453 { | |
| 454 /* Check the parameters */ | |
| 455 assert_param(IS_GPIO_PIN(GPIO_Pin)); | |
| 456 assert_param(IS_GPIO_PIN_ACTION(PinState)); | |
| 457 | |
| 458 if(PinState != GPIO_PIN_RESET) | |
| 459 { | |
| 460 GPIOx->BSRR = (uint32_t)GPIO_Pin; | |
| 461 } | |
| 462 else | |
| 463 { | |
| 464 GPIOx->BRR = (uint32_t)GPIO_Pin; | |
| 465 } | |
| 466 } | |
| 467 | |
| 468 /** | |
| 469 * @brief Toggle the specified GPIO pin. | |
| 470 * @param GPIOx: where x can be (A..H) to select the GPIO peripheral for STM32L4 family | |
| 471 * @param GPIO_Pin: specifies the pin to be toggled. | |
| 472 * @retval None | |
| 473 */ | |
| 474 void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) | |
| 475 { | |
| 476 /* Check the parameters */ | |
| 477 assert_param(IS_GPIO_PIN(GPIO_Pin)); | |
| 478 | |
| 479 GPIOx->ODR ^= GPIO_Pin; | |
| 480 } | |
| 481 | |
| 482 /** | |
| 483 * @brief Lock GPIO Pins configuration registers. | |
| 484 * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR, | |
| 485 * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH. | |
| 486 * @note The configuration of the locked GPIO pins can no longer be modified | |
| 487 * until the next reset. | |
| 488 * @param GPIOx: where x can be (A..H) to select the GPIO peripheral for STM32L4 family | |
| 489 * @param GPIO_Pin: specifies the port bits to be locked. | |
| 490 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). | |
| 491 * @retval None | |
| 492 */ | |
| 493 HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) | |
| 494 { | |
| 495 __IO uint32_t tmp = GPIO_LCKR_LCKK; | |
| 496 | |
| 497 /* Check the parameters */ | |
| 498 assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx)); | |
| 499 assert_param(IS_GPIO_PIN(GPIO_Pin)); | |
| 500 | |
| 501 /* Apply lock key write sequence */ | |
| 502 tmp |= GPIO_Pin; | |
| 503 /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ | |
| 504 GPIOx->LCKR = tmp; | |
| 505 /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */ | |
| 506 GPIOx->LCKR = GPIO_Pin; | |
| 507 /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ | |
| 508 GPIOx->LCKR = tmp; | |
| 509 /* Read LCKK bit*/ | |
| 510 tmp = GPIOx->LCKR; | |
| 511 | |
| 512 if((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET) | |
| 513 { | |
| 514 return HAL_OK; | |
| 515 } | |
| 516 else | |
| 517 { | |
| 518 return HAL_ERROR; | |
| 519 } | |
| 520 } | |
| 521 | |
| 522 /** | |
| 523 * @brief Handle EXTI interrupt request. | |
| 524 * @param GPIO_Pin: Specifies the port pin connected to corresponding EXTI line. | |
| 525 * @retval None | |
| 526 */ | |
| 527 void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin) | |
| 528 { | |
| 529 /* EXTI line interrupt detected */ | |
| 530 if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET) | |
| 531 { | |
| 532 __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin); | |
| 533 HAL_GPIO_EXTI_Callback(GPIO_Pin); | |
| 534 } | |
| 535 } | |
| 536 | |
| 537 /** | |
| 538 * @brief EXTI line detection callback. | |
| 539 * @param GPIO_Pin: Specifies the port pin connected to corresponding EXTI line. | |
| 540 * @retval None | |
| 541 */ | |
| 542 __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) | |
| 543 { | |
| 544 /* Prevent unused argument(s) compilation warning */ | |
| 545 UNUSED(GPIO_Pin); | |
| 546 | |
| 547 /* NOTE: This function should not be modified, when the callback is needed, | |
| 548 the HAL_GPIO_EXTI_Callback could be implemented in the user file | |
| 549 */ | |
| 550 } | |
| 551 | |
| 552 /** | |
| 553 * @} | |
| 554 */ | |
| 555 | |
| 556 | |
| 557 /** | |
| 558 * @} | |
| 559 */ | |
| 560 | |
| 561 #endif /* HAL_GPIO_MODULE_ENABLED */ | |
| 562 /** | |
| 563 * @} | |
| 564 */ | |
| 565 | |
| 566 /** | |
| 567 * @} | |
| 568 */ | |
| 569 | |
| 570 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
