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1 /* ----------------------------------------------------------------------
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2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
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3 *
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4 * $Date: 19. March 2015
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5 * $Revision: V.1.4.5
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6 *
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7 * Project: CMSIS DSP Library
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8 * Title: arm_shift_q15.c
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9 *
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10 * Description: Shifts the elements of a Q15 vector by a specified number of bits.
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11 *
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12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
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13 *
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14 * Redistribution and use in source and binary forms, with or without
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15 * modification, are permitted provided that the following conditions
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16 * are met:
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17 * - Redistributions of source code must retain the above copyright
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18 * notice, this list of conditions and the following disclaimer.
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19 * - Redistributions in binary form must reproduce the above copyright
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20 * notice, this list of conditions and the following disclaimer in
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21 * the documentation and/or other materials provided with the
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22 * distribution.
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23 * - Neither the name of ARM LIMITED nor the names of its contributors
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24 * may be used to endorse or promote products derived from this
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25 * software without specific prior written permission.
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26 *
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27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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38 * POSSIBILITY OF SUCH DAMAGE.
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39 * -------------------------------------------------------------------- */
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40
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41 #include "arm_math.h"
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42
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43 /**
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44 * @ingroup groupMath
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45 */
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46
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47 /**
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48 * @addtogroup shift
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49 * @{
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50 */
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51
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52 /**
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53 * @brief Shifts the elements of a Q15 vector a specified number of bits.
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54 * @param[in] *pSrc points to the input vector
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55 * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
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56 * @param[out] *pDst points to the output vector
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57 * @param[in] blockSize number of samples in the vector
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58 * @return none.
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59 *
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60 * <b>Scaling and Overflow Behavior:</b>
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61 * \par
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62 * The function uses saturating arithmetic.
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63 * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
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64 */
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65
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66 void arm_shift_q15(
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67 q15_t * pSrc,
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68 int8_t shiftBits,
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69 q15_t * pDst,
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70 uint32_t blockSize)
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71 {
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72 uint32_t blkCnt; /* loop counter */
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73 uint8_t sign; /* Sign of shiftBits */
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74
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75 #ifndef ARM_MATH_CM0_FAMILY
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76
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77 /* Run the below code for Cortex-M4 and Cortex-M3 */
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78
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79 q15_t in1, in2; /* Temporary variables */
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80
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81
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82 /*loop Unrolling */
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83 blkCnt = blockSize >> 2u;
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84
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85 /* Getting the sign of shiftBits */
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86 sign = (shiftBits & 0x80);
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87
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88 /* If the shift value is positive then do right shift else left shift */
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89 if(sign == 0u)
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90 {
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91 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
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92 ** a second loop below computes the remaining 1 to 3 samples. */
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93 while(blkCnt > 0u)
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94 {
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95 /* Read 2 inputs */
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96 in1 = *pSrc++;
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97 in2 = *pSrc++;
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98 /* C = A << shiftBits */
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99 /* Shift the inputs and then store the results in the destination buffer. */
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100 #ifndef ARM_MATH_BIG_ENDIAN
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101
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102 *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16),
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103 __SSAT((in2 << shiftBits), 16), 16);
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104
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105 #else
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106
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107 *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16),
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108 __SSAT((in1 << shiftBits), 16), 16);
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109
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110 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
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111
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112 in1 = *pSrc++;
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113 in2 = *pSrc++;
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114
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115 #ifndef ARM_MATH_BIG_ENDIAN
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116
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117 *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16),
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118 __SSAT((in2 << shiftBits), 16), 16);
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119
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120 #else
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121
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122 *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16),
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123 __SSAT((in1 << shiftBits), 16), 16);
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124
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125 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
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126
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127 /* Decrement the loop counter */
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128 blkCnt--;
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129 }
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130
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131 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
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132 ** No loop unrolling is used. */
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133 blkCnt = blockSize % 0x4u;
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134
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135 while(blkCnt > 0u)
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136 {
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137 /* C = A << shiftBits */
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138 /* Shift and then store the results in the destination buffer. */
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139 *pDst++ = __SSAT((*pSrc++ << shiftBits), 16);
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140
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141 /* Decrement the loop counter */
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142 blkCnt--;
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143 }
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144 }
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145 else
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146 {
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147 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
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148 ** a second loop below computes the remaining 1 to 3 samples. */
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149 while(blkCnt > 0u)
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150 {
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151 /* Read 2 inputs */
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152 in1 = *pSrc++;
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153 in2 = *pSrc++;
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154
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155 /* C = A >> shiftBits */
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156 /* Shift the inputs and then store the results in the destination buffer. */
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157 #ifndef ARM_MATH_BIG_ENDIAN
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158
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159 *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits),
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160 (in2 >> -shiftBits), 16);
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161
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162 #else
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163
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164 *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits),
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165 (in1 >> -shiftBits), 16);
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166
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167 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
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168
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169 in1 = *pSrc++;
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170 in2 = *pSrc++;
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171
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172 #ifndef ARM_MATH_BIG_ENDIAN
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173
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174 *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits),
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175 (in2 >> -shiftBits), 16);
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176
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177 #else
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178
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179 *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits),
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180 (in1 >> -shiftBits), 16);
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181
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182 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
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183
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184 /* Decrement the loop counter */
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185 blkCnt--;
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186 }
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187
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188 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
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189 ** No loop unrolling is used. */
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190 blkCnt = blockSize % 0x4u;
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191
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192 while(blkCnt > 0u)
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193 {
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194 /* C = A >> shiftBits */
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195 /* Shift the inputs and then store the results in the destination buffer. */
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196 *pDst++ = (*pSrc++ >> -shiftBits);
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197
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198 /* Decrement the loop counter */
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199 blkCnt--;
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200 }
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201 }
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202
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203 #else
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204
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205 /* Run the below code for Cortex-M0 */
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206
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207 /* Getting the sign of shiftBits */
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208 sign = (shiftBits & 0x80);
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209
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210 /* If the shift value is positive then do right shift else left shift */
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211 if(sign == 0u)
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212 {
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213 /* Initialize blkCnt with number of samples */
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214 blkCnt = blockSize;
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215
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216 while(blkCnt > 0u)
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217 {
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218 /* C = A << shiftBits */
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219 /* Shift and then store the results in the destination buffer. */
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220 *pDst++ = __SSAT(((q31_t) * pSrc++ << shiftBits), 16);
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221
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222 /* Decrement the loop counter */
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223 blkCnt--;
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224 }
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225 }
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226 else
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227 {
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228 /* Initialize blkCnt with number of samples */
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229 blkCnt = blockSize;
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230
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231 while(blkCnt > 0u)
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232 {
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233 /* C = A >> shiftBits */
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234 /* Shift the inputs and then store the results in the destination buffer. */
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235 *pDst++ = (*pSrc++ >> -shiftBits);
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236
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237 /* Decrement the loop counter */
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238 blkCnt--;
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239 }
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240 }
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241
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242 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
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243
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244 }
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245
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246 /**
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247 * @} end of shift group
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248 */
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