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1 /**
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2 ******************************************************************************
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3 * @file stm32f1xx_it.c
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4 * @brief Interrupt Service Routines.
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5 ******************************************************************************
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6 *
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7 * COPYRIGHT(c) 2017 STMicroelectronics
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8 *
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9 * Redistribution and use in source and binary forms, with or without modification,
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10 * are permitted provided that the following conditions are met:
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11 * 1. Redistributions of source code must retain the above copyright notice,
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12 * this list of conditions and the following disclaimer.
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13 * 2. Redistributions in binary form must reproduce the above copyright notice,
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14 * this list of conditions and the following disclaimer in the documentation
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15 * and/or other materials provided with the distribution.
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16 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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17 * may be used to endorse or promote products derived from this software
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18 * without specific prior written permission.
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19 *
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20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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23 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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26 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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27 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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28 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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29 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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30 *
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31 ******************************************************************************
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32 */
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33 /* Includes ------------------------------------------------------------------*/
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34 #include "stm32f1xx_hal.h"
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35 #include "stm32f1xx.h"
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36 #include "stm32f1xx_it.h"
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37
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38 /* USER CODE BEGIN 0 */
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39
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40 /* USER CODE END 0 */
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41
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42 /* External variables --------------------------------------------------------*/
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43
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44 /******************************************************************************/
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45 /* Cortex-M3 Processor Interruption and Exception Handlers */
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46 /******************************************************************************/
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47
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48 /**
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49 * @brief This function handles Non maskable interrupt.
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50 */
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51 void NMI_Handler(void)
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52 {
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53 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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54
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55 /* USER CODE END NonMaskableInt_IRQn 0 */
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56 /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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57
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58 /* USER CODE END NonMaskableInt_IRQn 1 */
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59 }
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60
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61 /**
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62 * @brief This function handles Hard fault interrupt.
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63 */
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64 void HardFault_Handler(void)
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65 {
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66 /* USER CODE BEGIN HardFault_IRQn 0 */
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67
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68 /* USER CODE END HardFault_IRQn 0 */
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69 while (1)
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70 {
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71 }
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72 /* USER CODE BEGIN HardFault_IRQn 1 */
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73
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74 /* USER CODE END HardFault_IRQn 1 */
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75 }
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76
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77 /**
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78 * @brief This function handles Memory management fault.
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79 */
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80 void MemManage_Handler(void)
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81 {
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82 /* USER CODE BEGIN MemoryManagement_IRQn 0 */
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83
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84 /* USER CODE END MemoryManagement_IRQn 0 */
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85 while (1)
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86 {
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87 }
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88 /* USER CODE BEGIN MemoryManagement_IRQn 1 */
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89
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90 /* USER CODE END MemoryManagement_IRQn 1 */
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91 }
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92
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93 /**
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94 * @brief This function handles Prefetch fault, memory access fault.
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95 */
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96 void BusFault_Handler(void)
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97 {
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98 /* USER CODE BEGIN BusFault_IRQn 0 */
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99
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100 /* USER CODE END BusFault_IRQn 0 */
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101 while (1)
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102 {
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103 }
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104 /* USER CODE BEGIN BusFault_IRQn 1 */
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105
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106 /* USER CODE END BusFault_IRQn 1 */
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107 }
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108
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109 /**
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110 * @brief This function handles Undefined instruction or illegal state.
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111 */
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112 void UsageFault_Handler(void)
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113 {
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114 /* USER CODE BEGIN UsageFault_IRQn 0 */
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115
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116 /* USER CODE END UsageFault_IRQn 0 */
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117 while (1)
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118 {
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119 }
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120 /* USER CODE BEGIN UsageFault_IRQn 1 */
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121
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122 /* USER CODE END UsageFault_IRQn 1 */
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123 }
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124
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125 /**
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126 * @brief This function handles System service call via SWI instruction.
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127 */
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128 void SVC_Handler(void)
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129 {
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130 /* USER CODE BEGIN SVCall_IRQn 0 */
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131
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132 /* USER CODE END SVCall_IRQn 0 */
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133 /* USER CODE BEGIN SVCall_IRQn 1 */
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134
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135 /* USER CODE END SVCall_IRQn 1 */
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136 }
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137
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138 /**
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139 * @brief This function handles Debug monitor.
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140 */
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141 void DebugMon_Handler(void)
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142 {
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143 /* USER CODE BEGIN DebugMonitor_IRQn 0 */
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144
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145 /* USER CODE END DebugMonitor_IRQn 0 */
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146 /* USER CODE BEGIN DebugMonitor_IRQn 1 */
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147
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148 /* USER CODE END DebugMonitor_IRQn 1 */
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149 }
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150
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151 /**
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152 * @brief This function handles Pendable request for system service.
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153 */
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154 void PendSV_Handler(void)
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155 {
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156 /* USER CODE BEGIN PendSV_IRQn 0 */
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157
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158 /* USER CODE END PendSV_IRQn 0 */
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159 /* USER CODE BEGIN PendSV_IRQn 1 */
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160
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161 /* USER CODE END PendSV_IRQn 1 */
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162 }
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163
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164 /**
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165 * @brief This function handles System tick timer.
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166 */
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167 void SysTick_Handler(void)
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168 {
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169 /* USER CODE BEGIN SysTick_IRQn 0 */
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170
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171 /* USER CODE END SysTick_IRQn 0 */
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172 HAL_IncTick();
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173 HAL_SYSTICK_IRQHandler();
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174 /* USER CODE BEGIN SysTick_IRQn 1 */
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175
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176 /* USER CODE END SysTick_IRQn 1 */
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177 }
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178
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179 /******************************************************************************/
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180 /* STM32F1xx Peripheral Interrupt Handlers */
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181 /* Add here the Interrupt Handlers for the used peripherals. */
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182 /* For the available peripheral interrupt handler names, */
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183 /* please refer to the startup file (startup_stm32f1xx.s). */
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184 /******************************************************************************/
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185
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186 /* USER CODE BEGIN 1 */
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187
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188 /* USER CODE END 1 */
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189 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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