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1 /**
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2 ******************************************************************************
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3 * @file stm32l4xx_hal_tim_ex.h
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4 * @author MCD Application Team
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5 * @version V1.6.0
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6 * @date 28-October-2016
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7 * @brief Header file of TIM HAL Extended module.
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8 ******************************************************************************
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9 * @attention
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10 *
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11 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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12 *
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13 * Redistribution and use in source and binary forms, with or without modification,
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14 * are permitted provided that the following conditions are met:
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15 * 1. Redistributions of source code must retain the above copyright notice,
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16 * this list of conditions and the following disclaimer.
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17 * 2. Redistributions in binary form must reproduce the above copyright notice,
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18 * this list of conditions and the following disclaimer in the documentation
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19 * and/or other materials provided with the distribution.
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20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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21 * may be used to endorse or promote products derived from this software
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22 * without specific prior written permission.
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23 *
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24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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34 *
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35 ******************************************************************************
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36 */
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37
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38 /* Define to prevent recursive inclusion -------------------------------------*/
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39 #ifndef __STM32L4xx_HAL_TIM_EX_H
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40 #define __STM32L4xx_HAL_TIM_EX_H
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41
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42 #ifdef __cplusplus
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43 extern "C" {
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44 #endif
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45
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46 /* Includes ------------------------------------------------------------------*/
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47 #include "stm32l4xx_hal_def.h"
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48
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49 /** @addtogroup STM32L4xx_HAL_Driver
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50 * @{
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51 */
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52
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53 /** @addtogroup TIMEx
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54 * @{
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55 */
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56
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57 /* Exported types ------------------------------------------------------------*/
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58 /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types
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59 * @{
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60 */
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61
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62 /**
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63 * @brief TIM Hall sensor Configuration Structure definition
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64 */
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65
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66 typedef struct
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67 {
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68
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69 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
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70 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
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71
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72 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
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73 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
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74
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75 uint32_t IC1Filter; /*!< Specifies the input capture filter.
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76 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
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77
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78 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
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79 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
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80 } TIM_HallSensor_InitTypeDef;
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81
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82 /**
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83 * @brief TIM Break/Break2 input configuration
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84 */
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85 typedef struct {
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86 uint32_t Source; /*!< Specifies the source of the timer break input.
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87 This parameter can be a value of @ref TIMEx_Break_Input_Source */
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88 uint32_t Enable; /*!< Specifies whether or not the break input source is enabled.
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89 This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */
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90 uint32_t Polarity; /*!< Specifies the break input source polarity.
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91 This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity
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92 Not relevant when analog watchdog output of the DFSDM1 used as break input source */
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93 } TIMEx_BreakInputConfigTypeDef;
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94
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95 /**
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96 * @}
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97 */
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98 /* End of exported types -----------------------------------------------------*/
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99
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100 /* Exported constants --------------------------------------------------------*/
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101 /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants
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102 * @{
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103 */
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104
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105 /** @defgroup TIMEx_Remap TIM Extended Remapping
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106 * @{
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107 */
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108 #define TIM_TIM1_ETR_ADC1_NONE ((uint32_t)(0x00000000)) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/
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109 #define TIM_TIM1_ETR_ADC1_AWD1 (TIM1_OR1_ETR_ADC1_RMP_0) /* !< TIM1_ETR is connected to ADC1 AWD1 */
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110 #define TIM_TIM1_ETR_ADC1_AWD2 (TIM1_OR1_ETR_ADC1_RMP_1) /* !< TIM1_ETR is connected to ADC1 AWD2 */
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111 #define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_OR1_ETR_ADC1_RMP_1 | TIM1_OR1_ETR_ADC1_RMP_0) /* !< TIM1_ETR is connected to ADC1 AWD3 */
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112 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
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113 #define TIM_TIM1_ETR_ADC3_NONE ((uint32_t)(0x00000000)) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/
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114 #define TIM_TIM1_ETR_ADC3_AWD1 (TIM1_OR1_ETR_ADC3_RMP_0) /* !< TIM1_ETR is connected to ADC3 AWD1 */
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115 #define TIM_TIM1_ETR_ADC3_AWD2 (TIM1_OR1_ETR_ADC3_RMP_1) /* !< TIM1_ETR is connected to ADC3 AWD2 */
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116 #define TIM_TIM1_ETR_ADC3_AWD3 (TIM1_OR1_ETR_ADC3_RMP_1 | TIM1_OR1_ETR_ADC3_RMP_0) /* !< TIM1_ETR is connected to ADC3 AWD3 */
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117 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
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118 #define TIM_TIM1_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM1 TI1 is connected to GPIO */
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119 #define TIM_TIM1_TI1_COMP1 (TIM1_OR1_TI1_RMP) /* !< TIM1 TI1 is connected to COMP1 */
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120 #define TIM_TIM1_ETR_COMP1 (TIM1_OR2_ETRSEL_0) /* !< TIM1_ETR is connected to COMP1 output */
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121 #define TIM_TIM1_ETR_COMP2 (TIM1_OR2_ETRSEL_1) /* !< TIM1_ETR is connected to COMP2 output */
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122
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123 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
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124 #define TIM_TIM2_ITR1_TIM8_TRGO ((uint32_t)(0x00000000)) /* !< TIM2_ITR1 is connected to TIM8_TRGO */
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125 #define TIM_TIM2_ITR1_OTG_FS_SOF (TIM2_OR1_ITR1_RMP) /* !< TIM2_ITR1 is connected to OTG_FS SOF */
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126 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
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127 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \
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128 defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx)
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129 #define TIM_TIM2_ITR1_NONE ((uint32_t)(0x00000000)) /* !< No internal trigger on TIM2_ITR1 */
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130 #define TIM_TIM2_ITR1_USB_SOF (TIM2_OR1_ITR1_RMP) /* !< TIM2_ITR1 is connected to USB SOF */
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131 #endif /* STM32L431xx || STM32L432xx || STM32L442xx || STM32L433xx || STM32L443xx || */
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132 /* STM32L451xx || STM32L452xx || STM32L462xx */
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133 #define TIM_TIM2_ETR_GPIO ((uint32_t)(0x00000000)) /* !< TIM2_ETR is connected to GPIO */
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134 #define TIM_TIM2_ETR_LSE (TIM2_OR1_ETR1_RMP) /* !< TIM2_ETR is connected to LSE */
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135 #define TIM_TIM2_ETR_COMP1 (TIM2_OR2_ETRSEL_0) /* !< TIM2_ETR is connected to COMP1 output */
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136 #define TIM_TIM2_ETR_COMP2 (TIM2_OR2_ETRSEL_1) /* !< TIM2_ETR is connected to COMP2 output */
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137 #define TIM_TIM2_TI4_GPIO ((uint32_t)(0x00000000)) /* !< TIM2 TI4 is connected to GPIO */
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138 #define TIM_TIM2_TI4_COMP1 (TIM2_OR1_TI4_RMP_0) /* !< TIM2 TI4 is connected to COMP1 output */
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139 #define TIM_TIM2_TI4_COMP2 (TIM2_OR1_TI4_RMP_1) /* !< TIM2 TI4 is connected to COMP2 output */
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140 #define TIM_TIM2_TI4_COMP1_COMP2 (TIM2_OR1_TI4_RMP_1| TIM2_OR1_TI4_RMP_0) /* !< TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output2 */
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141
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142 #if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \
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143 defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
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144 #define TIM_TIM3_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM3 TI1 is connected to GPIO */
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145 #define TIM_TIM3_TI1_COMP1 (TIM3_OR1_TI1_RMP_0) /* !< TIM3 TI1 is connected to COMP1 output */
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146 #define TIM_TIM3_TI1_COMP2 (TIM3_OR1_TI1_RMP_1) /* !< TIM3 TI1 is connected to COMP2 output */
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147 #define TIM_TIM3_TI1_COMP1_COMP2 (TIM3_OR1_TI1_RMP_1 | TIM3_OR1_TI1_RMP_0) /* !< TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output2 */
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148 #define TIM_TIM3_ETR_GPIO ((uint32_t)(0x00000000)) /* !< TIM3_ETR is connected to GPIO */
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149 #define TIM_TIM3_ETR_COMP1 (TIM3_OR2_ETRSEL_0) /* !< TIM3_ETR is connected to COMP1 output */
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150 #endif /* STM32L451xx || STM32L452xx || STM32L462xx || */
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151 /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
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152
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153 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
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154 #define TIM_TIM8_ETR_ADC2_NONE ((uint32_t)(0x00000000)) /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/
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155 #define TIM_TIM8_ETR_ADC2_AWD1 (TIM8_OR1_ETR_ADC2_RMP_0) /* !< TIM8_ETR is connected to ADC2 AWD1 */
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156 #define TIM_TIM8_ETR_ADC2_AWD2 (TIM8_OR1_ETR_ADC2_RMP_1) /* !< TIM8_ETR is connected to ADC2 AWD2 */
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157 #define TIM_TIM8_ETR_ADC2_AWD3 (TIM8_OR1_ETR_ADC2_RMP_1 | TIM8_OR1_ETR_ADC2_RMP_0) /* !< TIM8_ETR is connected to ADC2 AWD3 */
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158 #define TIM_TIM8_ETR_ADC3_NONE ((uint32_t)(0x00000000)) /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/
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159 #define TIM_TIM8_ETR_ADC3_AWD1 (TIM8_OR1_ETR_ADC3_RMP_0) /* !< TIM8_ETR is connected to ADC3 AWD1 */
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160 #define TIM_TIM8_ETR_ADC3_AWD2 (TIM8_OR1_ETR_ADC3_RMP_1) /* !< TIM8_ETR is connected to ADC3 AWD2 */
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161 #define TIM_TIM8_ETR_ADC3_AWD3 (TIM8_OR1_ETR_ADC3_RMP_1 | TIM8_OR1_ETR_ADC3_RMP_0) /* !< TIM8_ETR is connected to ADC3 AWD3 */
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162 #define TIM_TIM8_ETR_COMP1 (TIM8_OR2_ETRSEL_0) /* !< TIM8_ETR is connected to COMP1 output */
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163 #define TIM_TIM8_ETR_COMP2 (TIM8_OR2_ETRSEL_1) /* !< TIM8_ETR is connected to COMP2 output */
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164 #define TIM_TIM8_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM8 TI1 is connected to GPIO */
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165 #define TIM_TIM8_TI1_COMP2 (TIM8_OR1_TI1_RMP) /* !< TIM8 TI1 is connected to COMP1 */
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166 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
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167
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168 #define TIM_TIM15_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM15 TI1 is connected to GPIO */
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169 #define TIM_TIM15_TI1_LSE (TIM15_OR1_TI1_RMP) /* !< TIM15 TI1 is connected to LSE */
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170 #define TIM_TIM15_ENCODERMODE_NONE ((uint32_t)(0x00000000)) /* !< No redirection */
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171 #define TIM_TIM15_ENCODERMODE_TIM2 (TIM15_OR1_ENCODER_MODE_0) /* !< TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
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172 #if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \
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173 defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
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174 #define TIM_TIM15_ENCODERMODE_TIM3 (TIM15_OR1_ENCODER_MODE_1) /* !< TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
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175 #endif /* STM32L451xx || STM32L452xx || STM32L462xx */
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176 /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
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177 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
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178 #define TIM_TIM15_ENCODERMODE_TIM4 (TIM15_OR1_ENCODER_MODE_1 | TIM15_OR1_ENCODER_MODE_0) /* !< TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
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179 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
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180
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181 #define TIM_TIM16_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM16 TI1 is connected to GPIO */
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182 #define TIM_TIM16_TI1_LSI (TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to LSI */
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183 #define TIM_TIM16_TI1_LSE (TIM16_OR1_TI1_RMP_1) /* !< TIM16 TI1 is connected to LSE */
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184 #define TIM_TIM16_TI1_RTC (TIM16_OR1_TI1_RMP_1 | TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to RTC wakeup interrupt */
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185 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \
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186 defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx)
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187 #define TIM_TIM16_TI1_MSI (TIM16_OR1_TI1_RMP_2) /* !< TIM16 TI1 is connected to MSI */
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188 #define TIM_TIM16_TI1_HSE_32 (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to HSE div 32 */
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189 #define TIM_TIM16_TI1_MCO (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_1) /* !< TIM16 TI1 is connected to MCO */
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190 #endif /* STM32L431xx || STM32L432xx || STM32L442xx || STM32L433xx || STM32L443xx || */
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191 /* STM32L451xx || STM32L452xx || STM32L462xx */
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192
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193 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
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194 #define TIM_TIM17_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM17 TI1 is connected to GPIO */
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195 #define TIM_TIM17_TI1_MSI (TIM17_OR1_TI1_RMP_0) /* !< TIM17 TI1 is connected to MSI */
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196 #define TIM_TIM17_TI1_HSE_32 (TIM17_OR1_TI1_RMP_1) /* !< TIM17 TI1 is connected to HSE div 32 */
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197 #define TIM_TIM17_TI1_MCO (TIM17_OR1_TI1_RMP_1 | TIM17_OR1_TI1_RMP_0) /* !< TIM17 TI1 is connected to MCO */
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198 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
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199 /**
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200 * @}
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201 */
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202
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203 /** @defgroup TIMEx_Break_Input TIM Extended Break input
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204 * @{
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205 */
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206 #define TIM_BREAKINPUT_BRK ((uint32_t)(0x00000001)) /* !< Timer break input */
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207 #define TIM_BREAKINPUT_BRK2 ((uint32_t)(0x00000002)) /* !< Timer break2 input */
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208 /**
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209 * @}
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210 */
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211
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212 /** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source
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213 * @{
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214 */
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215 #define TIM_BREAKINPUTSOURCE_BKIN ((uint32_t)(0x00000001)) /* !< An external source (GPIO) is connected to the BKIN pin */
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216 #define TIM_BREAKINPUTSOURCE_COMP1 ((uint32_t)(0x00000002)) /* !< The COMP1 output is connected to the break input */
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217 #define TIM_BREAKINPUTSOURCE_COMP2 ((uint32_t)(0x00000004)) /* !< The COMP2 output is connected to the break input */
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218 #if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \
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219 defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
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220 #define TIM_BREAKINPUTSOURCE_DFSDM1 ((uint32_t)(0x00000008)) /* !< The analog watchdog output of the DFSDM1 peripheral is connected to the break input */
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221 #endif /* STM32L451xx || STM32L452xx || STM32L462xx || */
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222 /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
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223 /**
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224 * @}
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225 */
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226
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227 /** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling
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228 * @{
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229 */
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230 #define TIM_BREAKINPUTSOURCE_DISABLE ((uint32_t)(0x00000000)) /* !< Break input source is disabled */
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231 #define TIM_BREAKINPUTSOURCE_ENABLE ((uint32_t)(0x00000001)) /* !< Break input source is enabled */
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232 /**
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233 * @}
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234 */
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235
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236 /** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity
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237 * @{
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238 */
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239 #define TIM_BREAKINPUTSOURCE_POLARITY_LOW ((uint32_t)(0x00000001)) /* !< Break input source is active low */
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240 #define TIM_BREAKINPUTSOURCE_POLARITY_HIGH ((uint32_t)(0x00000000)) /* !< Break input source is active_high */
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241 /**
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242 * @}
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243 */
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244
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245 /**
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246 * @}
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247 */
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248 /* End of exported constants -------------------------------------------------*/
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249
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250 /* Exported macro ------------------------------------------------------------*/
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251 /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros
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252 * @{
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253 */
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254
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255 /**
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256 * @}
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257 */
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258 /* End of exported macro -----------------------------------------------------*/
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259
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260 /* Private macro -------------------------------------------------------------*/
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261 /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros
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262 * @{
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263 */
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264 #define IS_TIM_REMAP(__REMAP__) (((__REMAP__) <= (uint32_t)0x0001C01F))
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265
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266 #define IS_TIM_BREAKINPUT(__BREAKINPUT__) (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK) || \
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267 ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2))
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268
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269 #if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \
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270 defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
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271 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \
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272 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \
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273 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) || \
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274 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_DFSDM1))
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275 #else
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276 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \
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277 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \
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278 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2))
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279 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
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280
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281 #define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) || \
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282 ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE))
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283
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284 #define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW) || \
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285 ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH))
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286 /**
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287 * @}
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288 */
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289 /* End of private macro ------------------------------------------------------*/
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290
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291 /* Exported functions --------------------------------------------------------*/
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292 /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions
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293 * @{
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294 */
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295
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296 /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
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297 * @brief Timer Hall Sensor functions
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298 * @{
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299 */
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300 /* Timer Hall Sensor functions **********************************************/
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301 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig);
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302 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim);
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303
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304 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim);
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305 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim);
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306
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307 /* Blocking mode: Polling */
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308 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim);
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309 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim);
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310 /* Non-Blocking mode: Interrupt */
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311 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim);
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312 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim);
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313 /* Non-Blocking mode: DMA */
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314 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
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315 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim);
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316 /**
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317 * @}
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318 */
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319
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320 /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
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321 * @brief Timer Complementary Output Compare functions
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322 * @{
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323 */
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324 /* Timer Complementary Output Compare functions *****************************/
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325 /* Blocking mode: Polling */
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326 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
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327 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
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328
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329 /* Non-Blocking mode: Interrupt */
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330 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
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331 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
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332
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333 /* Non-Blocking mode: DMA */
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334 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
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335 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
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336 /**
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337 * @}
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338 */
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339
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340 /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
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341 * @brief Timer Complementary PWM functions
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342 * @{
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343 */
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344 /* Timer Complementary PWM functions ****************************************/
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345 /* Blocking mode: Polling */
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346 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
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347 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
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348
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349 /* Non-Blocking mode: Interrupt */
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350 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
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351 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
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352 /* Non-Blocking mode: DMA */
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353 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
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354 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
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355 /**
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356 * @}
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357 */
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358
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359 /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
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360 * @brief Timer Complementary One Pulse functions
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361 * @{
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362 */
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363 /* Timer Complementary One Pulse functions **********************************/
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364 /* Blocking mode: Polling */
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365 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
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366 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
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367
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368 /* Non-Blocking mode: Interrupt */
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369 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
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370 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
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371 /**
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372 * @}
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373 */
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374
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375 /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
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376 * @brief Peripheral Control functions
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377 * @{
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378 */
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379 /* Extended Control functions ************************************************/
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380 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
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381 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
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382 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
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383 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig);
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384 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
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385 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput, TIMEx_BreakInputConfigTypeDef *sBreakInputConfig);
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386 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels);
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387 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
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388
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389 /**
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390 * @}
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391 */
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392
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393 /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
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394 * @brief Extended Callbacks functions
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395 * @{
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396 */
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397 /* Extended Callback **********************************************************/
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398 void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim);
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399 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim);
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400 /**
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401 * @}
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402 */
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403
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404 /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
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405 * @brief Extended Peripheral State functions
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406 * @{
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407 */
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408 /* Extended Peripheral State functions ***************************************/
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409 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim);
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410 /**
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411 * @}
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412 */
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413
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414 /**
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415 * @}
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416 */
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417 /* End of exported functions -------------------------------------------------*/
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418
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419 /* Private functions----------------------------------------------------------*/
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420 /** @defgroup TIMEx_Private_Functions TIMEx Private Functions
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421 * @{
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422 */
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423 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
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424 /**
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425 * @}
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426 */
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427 /* End of private functions --------------------------------------------------*/
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428
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429 /**
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430 * @}
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431 */
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432
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433 /**
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434 * @}
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435 */
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436
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437 #ifdef __cplusplus
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438 }
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439 #endif
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440
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441
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442 #endif /* __STM32L4xx_HAL_TIM_EX_H */
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443
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444 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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