2
|
1 /* ----------------------------------------------------------------------
|
|
2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
|
3 *
|
|
4 * $Date: 19. March 2015
|
|
5 * $Revision: V.1.4.5
|
|
6 *
|
|
7 * Project: CMSIS DSP Library
|
|
8 * Title: arm_abs_q15.c
|
|
9 *
|
|
10 * Description: Q15 vector absolute value.
|
|
11 *
|
|
12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
|
13 *
|
|
14 * Redistribution and use in source and binary forms, with or without
|
|
15 * modification, are permitted provided that the following conditions
|
|
16 * are met:
|
|
17 * - Redistributions of source code must retain the above copyright
|
|
18 * notice, this list of conditions and the following disclaimer.
|
|
19 * - Redistributions in binary form must reproduce the above copyright
|
|
20 * notice, this list of conditions and the following disclaimer in
|
|
21 * the documentation and/or other materials provided with the
|
|
22 * distribution.
|
|
23 * - Neither the name of ARM LIMITED nor the names of its contributors
|
|
24 * may be used to endorse or promote products derived from this
|
|
25 * software without specific prior written permission.
|
|
26 *
|
|
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
|
30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
|
31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|
32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
|
33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
|
34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
|
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
|
37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
38 * POSSIBILITY OF SUCH DAMAGE.
|
|
39 * -------------------------------------------------------------------- */
|
|
40
|
|
41 #include "arm_math.h"
|
|
42
|
|
43 /**
|
|
44 * @ingroup groupMath
|
|
45 */
|
|
46
|
|
47 /**
|
|
48 * @addtogroup BasicAbs
|
|
49 * @{
|
|
50 */
|
|
51
|
|
52 /**
|
|
53 * @brief Q15 vector absolute value.
|
|
54 * @param[in] *pSrc points to the input buffer
|
|
55 * @param[out] *pDst points to the output buffer
|
|
56 * @param[in] blockSize number of samples in each vector
|
|
57 * @return none.
|
|
58 *
|
|
59 * <b>Scaling and Overflow Behavior:</b>
|
|
60 * \par
|
|
61 * The function uses saturating arithmetic.
|
|
62 * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
|
|
63 */
|
|
64
|
|
65 void arm_abs_q15(
|
|
66 q15_t * pSrc,
|
|
67 q15_t * pDst,
|
|
68 uint32_t blockSize)
|
|
69 {
|
|
70 uint32_t blkCnt; /* loop counter */
|
|
71
|
|
72 #ifndef ARM_MATH_CM0_FAMILY
|
|
73 __SIMD32_TYPE *simd;
|
|
74
|
|
75 /* Run the below code for Cortex-M4 and Cortex-M3 */
|
|
76
|
|
77 q15_t in1; /* Input value1 */
|
|
78 q15_t in2; /* Input value2 */
|
|
79
|
|
80
|
|
81 /*loop Unrolling */
|
|
82 blkCnt = blockSize >> 2u;
|
|
83
|
|
84 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
|
85 ** a second loop below computes the remaining 1 to 3 samples. */
|
|
86 simd = __SIMD32_CONST(pDst);
|
|
87 while(blkCnt > 0u)
|
|
88 {
|
|
89 /* C = |A| */
|
|
90 /* Read two inputs */
|
|
91 in1 = *pSrc++;
|
|
92 in2 = *pSrc++;
|
|
93
|
|
94
|
|
95 /* Store the Absolute result in the destination buffer by packing the two values, in a single cycle */
|
|
96 #ifndef ARM_MATH_BIG_ENDIAN
|
|
97 *simd++ =
|
|
98 __PKHBT(((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)),
|
|
99 ((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), 16);
|
|
100
|
|
101 #else
|
|
102
|
|
103
|
|
104 *simd++ =
|
|
105 __PKHBT(((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)),
|
|
106 ((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), 16);
|
|
107
|
|
108 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
|
|
109
|
|
110 in1 = *pSrc++;
|
|
111 in2 = *pSrc++;
|
|
112
|
|
113
|
|
114 #ifndef ARM_MATH_BIG_ENDIAN
|
|
115
|
|
116 *simd++ =
|
|
117 __PKHBT(((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)),
|
|
118 ((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), 16);
|
|
119
|
|
120 #else
|
|
121
|
|
122
|
|
123 *simd++ =
|
|
124 __PKHBT(((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)),
|
|
125 ((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), 16);
|
|
126
|
|
127 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
|
|
128
|
|
129 /* Decrement the loop counter */
|
|
130 blkCnt--;
|
|
131 }
|
|
132 pDst = (q15_t *)simd;
|
|
133
|
|
134 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
|
135 ** No loop unrolling is used. */
|
|
136 blkCnt = blockSize % 0x4u;
|
|
137
|
|
138 while(blkCnt > 0u)
|
|
139 {
|
|
140 /* C = |A| */
|
|
141 /* Read the input */
|
|
142 in1 = *pSrc++;
|
|
143
|
|
144 /* Calculate absolute value of input and then store the result in the destination buffer. */
|
|
145 *pDst++ = (in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1);
|
|
146
|
|
147 /* Decrement the loop counter */
|
|
148 blkCnt--;
|
|
149 }
|
|
150
|
|
151 #else
|
|
152
|
|
153 /* Run the below code for Cortex-M0 */
|
|
154
|
|
155 q15_t in; /* Temporary input variable */
|
|
156
|
|
157 /* Initialize blkCnt with number of samples */
|
|
158 blkCnt = blockSize;
|
|
159
|
|
160 while(blkCnt > 0u)
|
|
161 {
|
|
162 /* C = |A| */
|
|
163 /* Read the input */
|
|
164 in = *pSrc++;
|
|
165
|
|
166 /* Calculate absolute value of input and then store the result in the destination buffer. */
|
|
167 *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
|
|
168
|
|
169 /* Decrement the loop counter */
|
|
170 blkCnt--;
|
|
171 }
|
|
172
|
|
173 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
|
174
|
|
175 }
|
|
176
|
|
177 /**
|
|
178 * @} end of BasicAbs group
|
|
179 */
|