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comparison f103c8/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c @ 2:0c59e7a7782a
Working on GPIO and RCC
author | cin |
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date | Mon, 16 Jan 2017 11:04:47 +0300 |
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1 /* ---------------------------------------------------------------------- | |
2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved. | |
3 * | |
4 * $Date: 19. March 2015 | |
5 * $Revision: V.1.4.5 | |
6 * | |
7 * Project: CMSIS DSP Library | |
8 * Title: arm_mult_q7.c | |
9 * | |
10 * Description: Q7 vector multiplication. | |
11 * | |
12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 | |
13 * | |
14 * Redistribution and use in source and binary forms, with or without | |
15 * modification, are permitted provided that the following conditions | |
16 * are met: | |
17 * - Redistributions of source code must retain the above copyright | |
18 * notice, this list of conditions and the following disclaimer. | |
19 * - Redistributions in binary form must reproduce the above copyright | |
20 * notice, this list of conditions and the following disclaimer in | |
21 * the documentation and/or other materials provided with the | |
22 * distribution. | |
23 * - Neither the name of ARM LIMITED nor the names of its contributors | |
24 * may be used to endorse or promote products derived from this | |
25 * software without specific prior written permission. | |
26 * | |
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS | |
30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE | |
31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, | |
32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | |
33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | |
34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN | |
37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
38 * POSSIBILITY OF SUCH DAMAGE. | |
39 * -------------------------------------------------------------------- */ | |
40 | |
41 #include "arm_math.h" | |
42 | |
43 /** | |
44 * @ingroup groupMath | |
45 */ | |
46 | |
47 /** | |
48 * @addtogroup BasicMult | |
49 * @{ | |
50 */ | |
51 | |
52 /** | |
53 * @brief Q7 vector multiplication | |
54 * @param[in] *pSrcA points to the first input vector | |
55 * @param[in] *pSrcB points to the second input vector | |
56 * @param[out] *pDst points to the output vector | |
57 * @param[in] blockSize number of samples in each vector | |
58 * @return none. | |
59 * | |
60 * <b>Scaling and Overflow Behavior:</b> | |
61 * \par | |
62 * The function uses saturating arithmetic. | |
63 * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated. | |
64 */ | |
65 | |
66 void arm_mult_q7( | |
67 q7_t * pSrcA, | |
68 q7_t * pSrcB, | |
69 q7_t * pDst, | |
70 uint32_t blockSize) | |
71 { | |
72 uint32_t blkCnt; /* loop counters */ | |
73 | |
74 #ifndef ARM_MATH_CM0_FAMILY | |
75 | |
76 /* Run the below code for Cortex-M4 and Cortex-M3 */ | |
77 q7_t out1, out2, out3, out4; /* Temporary variables to store the product */ | |
78 | |
79 /* loop Unrolling */ | |
80 blkCnt = blockSize >> 2u; | |
81 | |
82 /* First part of the processing with loop unrolling. Compute 4 outputs at a time. | |
83 ** a second loop below computes the remaining 1 to 3 samples. */ | |
84 while(blkCnt > 0u) | |
85 { | |
86 /* C = A * B */ | |
87 /* Multiply the inputs and store the results in temporary variables */ | |
88 out1 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); | |
89 out2 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); | |
90 out3 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); | |
91 out4 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); | |
92 | |
93 /* Store the results of 4 inputs in the destination buffer in single cycle by packing */ | |
94 *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4); | |
95 | |
96 /* Decrement the blockSize loop counter */ | |
97 blkCnt--; | |
98 } | |
99 | |
100 /* If the blockSize is not a multiple of 4, compute any remaining output samples here. | |
101 ** No loop unrolling is used. */ | |
102 blkCnt = blockSize % 0x4u; | |
103 | |
104 #else | |
105 | |
106 /* Run the below code for Cortex-M0 */ | |
107 | |
108 /* Initialize blkCnt with number of samples */ | |
109 blkCnt = blockSize; | |
110 | |
111 #endif /* #ifndef ARM_MATH_CM0_FAMILY */ | |
112 | |
113 | |
114 while(blkCnt > 0u) | |
115 { | |
116 /* C = A * B */ | |
117 /* Multiply the inputs and store the result in the destination buffer */ | |
118 *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); | |
119 | |
120 /* Decrement the blockSize loop counter */ | |
121 blkCnt--; | |
122 } | |
123 } | |
124 | |
125 /** | |
126 * @} end of BasicMult group | |
127 */ |