Mercurial > pub > halpp

comparison l476rg/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h @ 0:32a3b1785697

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
a rough draft of Hardware Abstraction Layer for C++ STM32L476RG drivers
author cin
date Thu, 12 Jan 2017 02:45:43 +0300
parents
children
comparison
equal deleted inserted replaced
-1:000000000000 0:32a3b1785697
1 /**
2 ******************************************************************************
3 * @file stm32l4xx_hal_i2c.h
4 * @author MCD Application Team
5 * @version V1.6.0
6 * @date 28-October-2016
7 * @brief Header file of I2C HAL module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32L4xx_HAL_I2C_H
40 #define __STM32L4xx_HAL_I2C_H
41
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32l4xx_hal_def.h"
48
49 /** @addtogroup STM32L4xx_HAL_Driver
50 * @{
51 */
52
53 /** @addtogroup I2C
54 * @{
55 */
56
57 /* Exported types ------------------------------------------------------------*/
58 /** @defgroup I2C_Exported_Types I2C Exported Types
59 * @{
60 */
61
62 /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition
63 * @brief I2C Configuration Structure definition
64 * @{
65 */
66 typedef struct
67 {
68 uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value.
69 This parameter calculated by referring to I2C initialization
70 section in Reference manual */
71
72 uint32_t OwnAddress1; /*!< Specifies the first device own address.
73 This parameter can be a 7-bit or 10-bit address. */
74
75 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
76 This parameter can be a value of @ref I2C_ADDRESSING_MODE */
77
78 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
79 This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */
80
81 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
82 This parameter can be a 7-bit address. */
83
84 uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected
85 This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */
86
87 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
88 This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */
89
90 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
91 This parameter can be a value of @ref I2C_NOSTRETCH_MODE */
92
93 }I2C_InitTypeDef;
94
95 /**
96 * @}
97 */
98
99 /** @defgroup HAL_state_structure_definition HAL state structure definition
100 * @brief HAL State structure definition
101 * @note HAL I2C State value coding follow below described bitmap :\n
102 * b7-b6 Error information\n
103 * 00 : No Error\n
104 * 01 : Abort (Abort user request on going)\n
105 * 10 : Timeout\n
106 * 11 : Error\n
107 * b5 IP initilisation status\n
108 * 0 : Reset (IP not initialized)\n
109 * 1 : Init done (IP initialized and ready to use. HAL I2C Init function called)\n
110 * b4 (not used)\n
111 * x : Should be set to 0\n
112 * b3\n
113 * 0 : Ready or Busy (No Listen mode ongoing)\n
114 * 1 : Listen (IP in Address Listen Mode)\n
115 * b2 Intrinsic process state\n
116 * 0 : Ready\n
117 * 1 : Busy (IP busy with some configuration or internal operations)\n
118 * b1 Rx state\n
119 * 0 : Ready (no Rx operation ongoing)\n
120 * 1 : Busy (Rx operation ongoing)\n
121 * b0 Tx state\n
122 * 0 : Ready (no Tx operation ongoing)\n
123 * 1 : Busy (Tx operation ongoing)
124 * @{
125 */
126 typedef enum
127 {
128 HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */
129 HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */
130 HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */
131 HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */
132 HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
133 HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */
134 HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission
135 process is ongoing */
136 HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception
137 process is ongoing */
138 HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */
139 HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */
140 HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */
141
142 }HAL_I2C_StateTypeDef;
143
144 /**
145 * @}
146 */
147
148 /** @defgroup HAL_mode_structure_definition HAL mode structure definition
149 * @brief HAL Mode structure definition
150 * @note HAL I2C Mode value coding follow below described bitmap :\n
151 * b7 (not used)\n
152 * x : Should be set to 0\n
153 * b6\n
154 * 0 : None\n
155 * 1 : Memory (HAL I2C communication is in Memory Mode)\n
156 * b5\n
157 * 0 : None\n
158 * 1 : Slave (HAL I2C communication is in Slave Mode)\n
159 * b4\n
160 * 0 : None\n
161 * 1 : Master (HAL I2C communication is in Master Mode)\n
162 * b3-b2-b1-b0 (not used)\n
163 * xxxx : Should be set to 0000
164 * @{
165 */
166 typedef enum
167 {
168 HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */
169 HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */
170 HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */
171 HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */
172
173 }HAL_I2C_ModeTypeDef;
174
175 /**
176 * @}
177 */
178
179 /** @defgroup I2C_Error_Code_definition I2C Error Code definition
180 * @brief I2C Error Code definition
181 * @{
182 */
183 #define HAL_I2C_ERROR_NONE (0x00000000U) /*!< No error */
184 #define HAL_I2C_ERROR_BERR (0x00000001U) /*!< BERR error */
185 #define HAL_I2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */
186 #define HAL_I2C_ERROR_AF (0x00000004U) /*!< ACKF error */
187 #define HAL_I2C_ERROR_OVR (0x00000008U) /*!< OVR error */
188 #define HAL_I2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
189 #define HAL_I2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */
190 #define HAL_I2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */
191 /**
192 * @}
193 */
194
195 /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
196 * @brief I2C handle Structure definition
197 * @{
198 */
199 typedef struct __I2C_HandleTypeDef
200 {
201 I2C_TypeDef *Instance; /*!< I2C registers base address */
202
203 I2C_InitTypeDef Init; /*!< I2C communication parameters */
204
205 uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */
206
207 uint16_t XferSize; /*!< I2C transfer size */
208
209 __IO uint16_t XferCount; /*!< I2C transfer counter */
210
211 __IO uint32_t XferOptions; /*!< I2C sequantial transfer options, this parameter can
212 be a value of @ref I2C_XFEROPTIONS */
213
214 __IO uint32_t PreviousState; /*!< I2C communication Previous state */
215
216 HAL_StatusTypeDef (*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); /*!< I2C transfer IRQ handler function pointer */
217
218 DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */
219
220 DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */
221
222 HAL_LockTypeDef Lock; /*!< I2C locking object */
223
224 __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */
225
226 __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */
227
228 __IO uint32_t ErrorCode; /*!< I2C Error code */
229
230 __IO uint32_t AddrEventCount; /*!< I2C Address Event counter */
231 }I2C_HandleTypeDef;
232 /**
233 * @}
234 */
235
236 /**
237 * @}
238 */
239 /* Exported constants --------------------------------------------------------*/
240
241 /** @defgroup I2C_Exported_Constants I2C Exported Constants
242 * @{
243 */
244
245 /** @defgroup I2C_XFEROPTIONS I2C Sequential Transfer Options
246 * @{
247 */
248 #define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE)
249 #define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
250 #define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
251 #define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
252 #define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
253 /**
254 * @}
255 */
256
257 /** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode
258 * @{
259 */
260 #define I2C_ADDRESSINGMODE_7BIT (0x00000001U)
261 #define I2C_ADDRESSINGMODE_10BIT (0x00000002U)
262 /**
263 * @}
264 */
265
266 /** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode
267 * @{
268 */
269 #define I2C_DUALADDRESS_DISABLE (0x00000000U)
270 #define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN
271 /**
272 * @}
273 */
274
275 /** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks
276 * @{
277 */
278 #define I2C_OA2_NOMASK ((uint8_t)0x00U)
279 #define I2C_OA2_MASK01 ((uint8_t)0x01U)
280 #define I2C_OA2_MASK02 ((uint8_t)0x02U)
281 #define I2C_OA2_MASK03 ((uint8_t)0x03U)
282 #define I2C_OA2_MASK04 ((uint8_t)0x04U)
283 #define I2C_OA2_MASK05 ((uint8_t)0x05U)
284 #define I2C_OA2_MASK06 ((uint8_t)0x06U)
285 #define I2C_OA2_MASK07 ((uint8_t)0x07U)
286 /**
287 * @}
288 */
289
290 /** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode
291 * @{
292 */
293 #define I2C_GENERALCALL_DISABLE (0x00000000U)
294 #define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN
295 /**
296 * @}
297 */
298
299 /** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode
300 * @{
301 */
302 #define I2C_NOSTRETCH_DISABLE (0x00000000U)
303 #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
304 /**
305 * @}
306 */
307
308 /** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size
309 * @{
310 */
311 #define I2C_MEMADD_SIZE_8BIT (0x00000001U)
312 #define I2C_MEMADD_SIZE_16BIT (0x00000002U)
313 /**
314 * @}
315 */
316
317 /** @defgroup I2C_XFERDIRECTION I2C Transfer Direction Master Point of View
318 * @{
319 */
320 #define I2C_DIRECTION_TRANSMIT (0x00000000U)
321 #define I2C_DIRECTION_RECEIVE (0x00000001U)
322 /**
323 * @}
324 */
325
326 /** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode
327 * @{
328 */
329 #define I2C_RELOAD_MODE I2C_CR2_RELOAD
330 #define I2C_AUTOEND_MODE I2C_CR2_AUTOEND
331 #define I2C_SOFTEND_MODE (0x00000000U)
332 /**
333 * @}
334 */
335
336 /** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode
337 * @{
338 */
339 #define I2C_NO_STARTSTOP (0x00000000U)
340 #define I2C_GENERATE_STOP I2C_CR2_STOP
341 #define I2C_GENERATE_START_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN)
342 #define I2C_GENERATE_START_WRITE I2C_CR2_START
343 /**
344 * @}
345 */
346
347 /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition
348 * @brief I2C Interrupt definition
349 * Elements values convention: 0xXXXXXXXX
350 * - XXXXXXXX : Interrupt control mask
351 * @{
352 */
353 #define I2C_IT_ERRI I2C_CR1_ERRIE
354 #define I2C_IT_TCI I2C_CR1_TCIE
355 #define I2C_IT_STOPI I2C_CR1_STOPIE
356 #define I2C_IT_NACKI I2C_CR1_NACKIE
357 #define I2C_IT_ADDRI I2C_CR1_ADDRIE
358 #define I2C_IT_RXI I2C_CR1_RXIE
359 #define I2C_IT_TXI I2C_CR1_TXIE
360 /**
361 * @}
362 */
363
364 /** @defgroup I2C_Flag_definition I2C Flag definition
365 * @{
366 */
367 #define I2C_FLAG_TXE I2C_ISR_TXE
368 #define I2C_FLAG_TXIS I2C_ISR_TXIS
369 #define I2C_FLAG_RXNE I2C_ISR_RXNE
370 #define I2C_FLAG_ADDR I2C_ISR_ADDR
371 #define I2C_FLAG_AF I2C_ISR_NACKF
372 #define I2C_FLAG_STOPF I2C_ISR_STOPF
373 #define I2C_FLAG_TC I2C_ISR_TC
374 #define I2C_FLAG_TCR I2C_ISR_TCR
375 #define I2C_FLAG_BERR I2C_ISR_BERR
376 #define I2C_FLAG_ARLO I2C_ISR_ARLO
377 #define I2C_FLAG_OVR I2C_ISR_OVR
378 #define I2C_FLAG_PECERR I2C_ISR_PECERR
379 #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT
380 #define I2C_FLAG_ALERT I2C_ISR_ALERT
381 #define I2C_FLAG_BUSY I2C_ISR_BUSY
382 #define I2C_FLAG_DIR I2C_ISR_DIR
383 /**
384 * @}
385 */
386
387 /**
388 * @}
389 */
390
391 /* Exported macros -----------------------------------------------------------*/
392
393 /** @defgroup I2C_Exported_Macros I2C Exported Macros
394 * @{
395 */
396
397 /** @brief Reset I2C handle state.
398 * @param __HANDLE__ specifies the I2C Handle.
399 * @retval None
400 */
401 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
402
403 /** @brief Enable the specified I2C interrupt.
404 * @param __HANDLE__ specifies the I2C Handle.
405 * @param __INTERRUPT__ specifies the interrupt source to enable.
406 * This parameter can be one of the following values:
407 * @arg @ref I2C_IT_ERRI Errors interrupt enable
408 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable
409 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable
410 * @arg @ref I2C_IT_NACKI NACK received interrupt enable
411 * @arg @ref I2C_IT_ADDRI Address match interrupt enable
412 * @arg @ref I2C_IT_RXI RX interrupt enable
413 * @arg @ref I2C_IT_TXI TX interrupt enable
414 *
415 * @retval None
416 */
417 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
418
419 /** @brief Disable the specified I2C interrupt.
420 * @param __HANDLE__ specifies the I2C Handle.
421 * @param __INTERRUPT__ specifies the interrupt source to disable.
422 * This parameter can be one of the following values:
423 * @arg @ref I2C_IT_ERRI Errors interrupt enable
424 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable
425 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable
426 * @arg @ref I2C_IT_NACKI NACK received interrupt enable
427 * @arg @ref I2C_IT_ADDRI Address match interrupt enable
428 * @arg @ref I2C_IT_RXI RX interrupt enable
429 * @arg @ref I2C_IT_TXI TX interrupt enable
430 *
431 * @retval None
432 */
433 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
434
435 /** @brief Check whether the specified I2C interrupt source is enabled or not.
436 * @param __HANDLE__ specifies the I2C Handle.
437 * @param __INTERRUPT__ specifies the I2C interrupt source to check.
438 * This parameter can be one of the following values:
439 * @arg @ref I2C_IT_ERRI Errors interrupt enable
440 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable
441 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable
442 * @arg @ref I2C_IT_NACKI NACK received interrupt enable
443 * @arg @ref I2C_IT_ADDRI Address match interrupt enable
444 * @arg @ref I2C_IT_RXI RX interrupt enable
445 * @arg @ref I2C_IT_TXI TX interrupt enable
446 *
447 * @retval The new state of __INTERRUPT__ (SET or RESET).
448 */
449 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
450
451 /** @brief Check whether the specified I2C flag is set or not.
452 * @param __HANDLE__ specifies the I2C Handle.
453 * @param __FLAG__ specifies the flag to check.
454 * This parameter can be one of the following values:
455 * @arg @ref I2C_FLAG_TXE Transmit data register empty
456 * @arg @ref I2C_FLAG_TXIS Transmit interrupt status
457 * @arg @ref I2C_FLAG_RXNE Receive data register not empty
458 * @arg @ref I2C_FLAG_ADDR Address matched (slave mode)
459 * @arg @ref I2C_FLAG_AF Acknowledge failure received flag
460 * @arg @ref I2C_FLAG_STOPF STOP detection flag
461 * @arg @ref I2C_FLAG_TC Transfer complete (master mode)
462 * @arg @ref I2C_FLAG_TCR Transfer complete reload
463 * @arg @ref I2C_FLAG_BERR Bus error
464 * @arg @ref I2C_FLAG_ARLO Arbitration lost
465 * @arg @ref I2C_FLAG_OVR Overrun/Underrun
466 * @arg @ref I2C_FLAG_PECERR PEC error in reception
467 * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
468 * @arg @ref I2C_FLAG_ALERT SMBus alert
469 * @arg @ref I2C_FLAG_BUSY Bus busy
470 * @arg @ref I2C_FLAG_DIR Transfer direction (slave mode)
471 *
472 * @retval The new state of __FLAG__ (SET or RESET).
473 */
474 #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
475
476 /** @brief Clear the I2C pending flags which are cleared by writing 1 in a specific bit.
477 * @param __HANDLE__ specifies the I2C Handle.
478 * @param __FLAG__ specifies the flag to clear.
479 * This parameter can be any combination of the following values:
480 * @arg @ref I2C_FLAG_TXE Transmit data register empty
481 * @arg @ref I2C_FLAG_ADDR Address matched (slave mode)
482 * @arg @ref I2C_FLAG_AF Acknowledge failure received flag
483 * @arg @ref I2C_FLAG_STOPF STOP detection flag
484 * @arg @ref I2C_FLAG_BERR Bus error
485 * @arg @ref I2C_FLAG_ARLO Arbitration lost
486 * @arg @ref I2C_FLAG_OVR Overrun/Underrun
487 * @arg @ref I2C_FLAG_PECERR PEC error in reception
488 * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
489 * @arg @ref I2C_FLAG_ALERT SMBus alert
490 *
491 * @retval None
492 */
493 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \
494 : ((__HANDLE__)->Instance->ICR = (__FLAG__)))
495
496 /** @brief Enable the specified I2C peripheral.
497 * @param __HANDLE__ specifies the I2C Handle.
498 * @retval None
499 */
500 #define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
501
502 /** @brief Disable the specified I2C peripheral.
503 * @param __HANDLE__ specifies the I2C Handle.
504 * @retval None
505 */
506 #define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
507
508 /** @brief Generate a Non-Acknowledge I2C peripheral in Slave mode.
509 * @param __HANDLE__: specifies the I2C Handle.
510 * @retval None
511 */
512 #define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))
513 /**
514 * @}
515 */
516
517 /* Include I2C HAL Extended module */
518 #include "stm32l4xx_hal_i2c_ex.h"
519
520 /* Exported functions --------------------------------------------------------*/
521 /** @addtogroup I2C_Exported_Functions
522 * @{
523 */
524
525 /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
526 * @{
527 */
528 /* Initialization and de-initialization functions******************************/
529 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
530 HAL_StatusTypeDef HAL_I2C_DeInit (I2C_HandleTypeDef *hi2c);
531 void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
532 void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
533 /**
534 * @}
535 */
536
537 /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions
538 * @{
539 */
540 /* IO operation functions ****************************************************/
541 /******* Blocking mode: Polling */
542 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
543 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
544 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
545 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
546 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
547 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
548 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
549
550 /******* Non-Blocking mode: Interrupt */
551 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
552 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
553 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
554 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
555 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
556 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
557
558 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
559 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
560 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
561 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
562 HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
563 HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
564 HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
565
566 /******* Non-Blocking mode: DMA */
567 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
568 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
569 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
570 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
571 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
572 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
573 /**
574 * @}
575 */
576
577 /** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
578 * @{
579 */
580 /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
581 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
582 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
583 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
584 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
585 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
586 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
587 void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
588 void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
589 void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
590 void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
591 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
592 void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
593 /**
594 * @}
595 */
596
597 /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
598 * @{
599 */
600 /* Peripheral State, Mode and Error functions *********************************/
601 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
602 HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);
603 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
604
605 /**
606 * @}
607 */
608
609 /**
610 * @}
611 */
612
613 /* Private constants ---------------------------------------------------------*/
614 /** @defgroup I2C_Private_Constants I2C Private Constants
615 * @{
616 */
617
618 /**
619 * @}
620 */
621
622 /* Private macros ------------------------------------------------------------*/
623 /** @defgroup I2C_Private_Macro I2C Private Macros
624 * @{
625 */
626
627 #define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \
628 ((MODE) == I2C_ADDRESSINGMODE_10BIT))
629
630 #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
631 ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
632
633 #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \
634 ((MASK) == I2C_OA2_MASK01) || \
635 ((MASK) == I2C_OA2_MASK02) || \
636 ((MASK) == I2C_OA2_MASK03) || \
637 ((MASK) == I2C_OA2_MASK04) || \
638 ((MASK) == I2C_OA2_MASK05) || \
639 ((MASK) == I2C_OA2_MASK06) || \
640 ((MASK) == I2C_OA2_MASK07))
641
642 #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
643 ((CALL) == I2C_GENERALCALL_ENABLE))
644
645 #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
646 ((STRETCH) == I2C_NOSTRETCH_ENABLE))
647
648 #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
649 ((SIZE) == I2C_MEMADD_SIZE_16BIT))
650
651 #define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \
652 ((MODE) == I2C_AUTOEND_MODE) || \
653 ((MODE) == I2C_SOFTEND_MODE))
654
655 #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \
656 ((REQUEST) == I2C_GENERATE_START_READ) || \
657 ((REQUEST) == I2C_GENERATE_START_WRITE) || \
658 ((REQUEST) == I2C_NO_STARTSTOP))
659
660 #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \
661 ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \
662 ((REQUEST) == I2C_NEXT_FRAME) || \
663 ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
664 ((REQUEST) == I2C_LAST_FRAME))
665
666 #define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN)))
667
668 #define I2C_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16U)
669 #define I2C_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U)
670 #define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
671 #define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1)
672 #define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2)
673
674 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU)
675 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)
676
677 #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U)))
678 #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
679
680 #define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \
681 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))
682 /**
683 * @}
684 */
685
686 /* Private Functions ---------------------------------------------------------*/
687 /** @defgroup I2C_Private_Functions I2C Private Functions
688 * @{
689 */
690 /* Private functions are defined in stm32l4xx_hal_i2c.c file */
691 /**
692 * @}
693 */
694
695 /**
696 * @}
697 */
698
699 /**
700 * @}
701 */
702
703 #ifdef __cplusplus
704 }
705 #endif
706
707
708 #endif /* __STM32L4xx_HAL_I2C_H */
709
710 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/