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1 /**
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2 ******************************************************************************
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3 * @file stm32l4xx_hal_i2c.h
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4 * @author MCD Application Team
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5 * @version V1.6.0
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6 * @date 28-October-2016
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7 * @brief Header file of I2C HAL module.
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8 ******************************************************************************
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9 * @attention
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10 *
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11 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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12 *
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13 * Redistribution and use in source and binary forms, with or without modification,
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14 * are permitted provided that the following conditions are met:
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15 * 1. Redistributions of source code must retain the above copyright notice,
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16 * this list of conditions and the following disclaimer.
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17 * 2. Redistributions in binary form must reproduce the above copyright notice,
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18 * this list of conditions and the following disclaimer in the documentation
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19 * and/or other materials provided with the distribution.
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20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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21 * may be used to endorse or promote products derived from this software
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22 * without specific prior written permission.
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23 *
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24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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34 *
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35 ******************************************************************************
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36 */
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37
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38 /* Define to prevent recursive inclusion -------------------------------------*/
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39 #ifndef __STM32L4xx_HAL_I2C_H
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40 #define __STM32L4xx_HAL_I2C_H
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41
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42 #ifdef __cplusplus
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43 extern "C" {
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44 #endif
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45
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46 /* Includes ------------------------------------------------------------------*/
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47 #include "stm32l4xx_hal_def.h"
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48
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49 /** @addtogroup STM32L4xx_HAL_Driver
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50 * @{
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51 */
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52
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53 /** @addtogroup I2C
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54 * @{
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55 */
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56
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57 /* Exported types ------------------------------------------------------------*/
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58 /** @defgroup I2C_Exported_Types I2C Exported Types
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59 * @{
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60 */
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61
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62 /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition
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63 * @brief I2C Configuration Structure definition
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64 * @{
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65 */
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66 typedef struct
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67 {
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68 uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value.
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69 This parameter calculated by referring to I2C initialization
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70 section in Reference manual */
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71
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72 uint32_t OwnAddress1; /*!< Specifies the first device own address.
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73 This parameter can be a 7-bit or 10-bit address. */
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74
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75 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
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76 This parameter can be a value of @ref I2C_ADDRESSING_MODE */
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77
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78 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
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79 This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */
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80
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81 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
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82 This parameter can be a 7-bit address. */
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83
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84 uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected
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85 This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */
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86
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87 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
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88 This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */
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89
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90 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
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91 This parameter can be a value of @ref I2C_NOSTRETCH_MODE */
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92
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93 }I2C_InitTypeDef;
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94
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95 /**
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96 * @}
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97 */
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98
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99 /** @defgroup HAL_state_structure_definition HAL state structure definition
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100 * @brief HAL State structure definition
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101 * @note HAL I2C State value coding follow below described bitmap :\n
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102 * b7-b6 Error information\n
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103 * 00 : No Error\n
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104 * 01 : Abort (Abort user request on going)\n
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105 * 10 : Timeout\n
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106 * 11 : Error\n
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107 * b5 IP initilisation status\n
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108 * 0 : Reset (IP not initialized)\n
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109 * 1 : Init done (IP initialized and ready to use. HAL I2C Init function called)\n
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110 * b4 (not used)\n
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111 * x : Should be set to 0\n
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112 * b3\n
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113 * 0 : Ready or Busy (No Listen mode ongoing)\n
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114 * 1 : Listen (IP in Address Listen Mode)\n
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115 * b2 Intrinsic process state\n
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116 * 0 : Ready\n
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117 * 1 : Busy (IP busy with some configuration or internal operations)\n
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118 * b1 Rx state\n
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119 * 0 : Ready (no Rx operation ongoing)\n
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120 * 1 : Busy (Rx operation ongoing)\n
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121 * b0 Tx state\n
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122 * 0 : Ready (no Tx operation ongoing)\n
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123 * 1 : Busy (Tx operation ongoing)
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124 * @{
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125 */
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126 typedef enum
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127 {
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128 HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */
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129 HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */
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130 HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */
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131 HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */
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132 HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
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133 HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */
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134 HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission
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135 process is ongoing */
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136 HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception
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137 process is ongoing */
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138 HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */
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139 HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */
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140 HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */
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141
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142 }HAL_I2C_StateTypeDef;
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143
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144 /**
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145 * @}
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146 */
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147
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148 /** @defgroup HAL_mode_structure_definition HAL mode structure definition
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149 * @brief HAL Mode structure definition
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150 * @note HAL I2C Mode value coding follow below described bitmap :\n
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151 * b7 (not used)\n
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152 * x : Should be set to 0\n
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153 * b6\n
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154 * 0 : None\n
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155 * 1 : Memory (HAL I2C communication is in Memory Mode)\n
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156 * b5\n
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157 * 0 : None\n
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158 * 1 : Slave (HAL I2C communication is in Slave Mode)\n
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159 * b4\n
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160 * 0 : None\n
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161 * 1 : Master (HAL I2C communication is in Master Mode)\n
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162 * b3-b2-b1-b0 (not used)\n
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163 * xxxx : Should be set to 0000
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164 * @{
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165 */
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166 typedef enum
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167 {
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168 HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */
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169 HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */
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170 HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */
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171 HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */
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172
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173 }HAL_I2C_ModeTypeDef;
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174
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175 /**
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176 * @}
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177 */
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178
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179 /** @defgroup I2C_Error_Code_definition I2C Error Code definition
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180 * @brief I2C Error Code definition
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181 * @{
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182 */
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183 #define HAL_I2C_ERROR_NONE (0x00000000U) /*!< No error */
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184 #define HAL_I2C_ERROR_BERR (0x00000001U) /*!< BERR error */
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185 #define HAL_I2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */
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186 #define HAL_I2C_ERROR_AF (0x00000004U) /*!< ACKF error */
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187 #define HAL_I2C_ERROR_OVR (0x00000008U) /*!< OVR error */
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188 #define HAL_I2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
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189 #define HAL_I2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */
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190 #define HAL_I2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */
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191 /**
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192 * @}
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193 */
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194
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195 /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
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196 * @brief I2C handle Structure definition
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197 * @{
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198 */
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199 typedef struct __I2C_HandleTypeDef
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200 {
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201 I2C_TypeDef *Instance; /*!< I2C registers base address */
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202
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203 I2C_InitTypeDef Init; /*!< I2C communication parameters */
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204
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205 uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */
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206
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207 uint16_t XferSize; /*!< I2C transfer size */
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208
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209 __IO uint16_t XferCount; /*!< I2C transfer counter */
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210
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211 __IO uint32_t XferOptions; /*!< I2C sequantial transfer options, this parameter can
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212 be a value of @ref I2C_XFEROPTIONS */
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213
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214 __IO uint32_t PreviousState; /*!< I2C communication Previous state */
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215
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216 HAL_StatusTypeDef (*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); /*!< I2C transfer IRQ handler function pointer */
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217
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218 DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */
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219
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220 DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */
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221
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222 HAL_LockTypeDef Lock; /*!< I2C locking object */
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223
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224 __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */
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225
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226 __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */
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227
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228 __IO uint32_t ErrorCode; /*!< I2C Error code */
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229
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230 __IO uint32_t AddrEventCount; /*!< I2C Address Event counter */
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231 }I2C_HandleTypeDef;
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232 /**
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233 * @}
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234 */
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235
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236 /**
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237 * @}
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238 */
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239 /* Exported constants --------------------------------------------------------*/
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240
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241 /** @defgroup I2C_Exported_Constants I2C Exported Constants
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242 * @{
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243 */
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244
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245 /** @defgroup I2C_XFEROPTIONS I2C Sequential Transfer Options
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246 * @{
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247 */
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248 #define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE)
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249 #define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
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250 #define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
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251 #define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
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252 #define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
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253 /**
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254 * @}
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255 */
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256
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257 /** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode
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258 * @{
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259 */
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260 #define I2C_ADDRESSINGMODE_7BIT (0x00000001U)
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261 #define I2C_ADDRESSINGMODE_10BIT (0x00000002U)
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262 /**
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263 * @}
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264 */
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265
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266 /** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode
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267 * @{
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268 */
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269 #define I2C_DUALADDRESS_DISABLE (0x00000000U)
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270 #define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN
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271 /**
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272 * @}
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273 */
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274
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275 /** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks
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276 * @{
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277 */
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278 #define I2C_OA2_NOMASK ((uint8_t)0x00U)
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279 #define I2C_OA2_MASK01 ((uint8_t)0x01U)
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280 #define I2C_OA2_MASK02 ((uint8_t)0x02U)
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281 #define I2C_OA2_MASK03 ((uint8_t)0x03U)
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282 #define I2C_OA2_MASK04 ((uint8_t)0x04U)
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283 #define I2C_OA2_MASK05 ((uint8_t)0x05U)
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284 #define I2C_OA2_MASK06 ((uint8_t)0x06U)
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285 #define I2C_OA2_MASK07 ((uint8_t)0x07U)
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286 /**
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287 * @}
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288 */
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289
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290 /** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode
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291 * @{
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292 */
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293 #define I2C_GENERALCALL_DISABLE (0x00000000U)
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294 #define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN
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295 /**
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296 * @}
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297 */
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298
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299 /** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode
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300 * @{
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301 */
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302 #define I2C_NOSTRETCH_DISABLE (0x00000000U)
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303 #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
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304 /**
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305 * @}
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306 */
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307
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308 /** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size
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309 * @{
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310 */
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311 #define I2C_MEMADD_SIZE_8BIT (0x00000001U)
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312 #define I2C_MEMADD_SIZE_16BIT (0x00000002U)
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313 /**
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314 * @}
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315 */
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316
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317 /** @defgroup I2C_XFERDIRECTION I2C Transfer Direction Master Point of View
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318 * @{
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319 */
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320 #define I2C_DIRECTION_TRANSMIT (0x00000000U)
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321 #define I2C_DIRECTION_RECEIVE (0x00000001U)
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322 /**
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323 * @}
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324 */
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325
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326 /** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode
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327 * @{
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328 */
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329 #define I2C_RELOAD_MODE I2C_CR2_RELOAD
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330 #define I2C_AUTOEND_MODE I2C_CR2_AUTOEND
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331 #define I2C_SOFTEND_MODE (0x00000000U)
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332 /**
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333 * @}
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334 */
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335
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336 /** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode
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337 * @{
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338 */
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339 #define I2C_NO_STARTSTOP (0x00000000U)
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340 #define I2C_GENERATE_STOP I2C_CR2_STOP
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341 #define I2C_GENERATE_START_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN)
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342 #define I2C_GENERATE_START_WRITE I2C_CR2_START
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343 /**
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344 * @}
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345 */
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346
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347 /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition
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348 * @brief I2C Interrupt definition
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349 * Elements values convention: 0xXXXXXXXX
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350 * - XXXXXXXX : Interrupt control mask
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351 * @{
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352 */
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353 #define I2C_IT_ERRI I2C_CR1_ERRIE
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354 #define I2C_IT_TCI I2C_CR1_TCIE
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355 #define I2C_IT_STOPI I2C_CR1_STOPIE
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356 #define I2C_IT_NACKI I2C_CR1_NACKIE
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357 #define I2C_IT_ADDRI I2C_CR1_ADDRIE
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358 #define I2C_IT_RXI I2C_CR1_RXIE
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359 #define I2C_IT_TXI I2C_CR1_TXIE
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360 /**
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361 * @}
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362 */
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363
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364 /** @defgroup I2C_Flag_definition I2C Flag definition
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365 * @{
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366 */
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367 #define I2C_FLAG_TXE I2C_ISR_TXE
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368 #define I2C_FLAG_TXIS I2C_ISR_TXIS
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369 #define I2C_FLAG_RXNE I2C_ISR_RXNE
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370 #define I2C_FLAG_ADDR I2C_ISR_ADDR
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371 #define I2C_FLAG_AF I2C_ISR_NACKF
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372 #define I2C_FLAG_STOPF I2C_ISR_STOPF
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373 #define I2C_FLAG_TC I2C_ISR_TC
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374 #define I2C_FLAG_TCR I2C_ISR_TCR
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375 #define I2C_FLAG_BERR I2C_ISR_BERR
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376 #define I2C_FLAG_ARLO I2C_ISR_ARLO
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377 #define I2C_FLAG_OVR I2C_ISR_OVR
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378 #define I2C_FLAG_PECERR I2C_ISR_PECERR
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379 #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT
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380 #define I2C_FLAG_ALERT I2C_ISR_ALERT
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381 #define I2C_FLAG_BUSY I2C_ISR_BUSY
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382 #define I2C_FLAG_DIR I2C_ISR_DIR
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383 /**
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384 * @}
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385 */
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386
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387 /**
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388 * @}
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389 */
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390
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391 /* Exported macros -----------------------------------------------------------*/
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392
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393 /** @defgroup I2C_Exported_Macros I2C Exported Macros
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394 * @{
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395 */
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396
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397 /** @brief Reset I2C handle state.
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398 * @param __HANDLE__ specifies the I2C Handle.
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399 * @retval None
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400 */
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401 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
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402
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403 /** @brief Enable the specified I2C interrupt.
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404 * @param __HANDLE__ specifies the I2C Handle.
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405 * @param __INTERRUPT__ specifies the interrupt source to enable.
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406 * This parameter can be one of the following values:
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407 * @arg @ref I2C_IT_ERRI Errors interrupt enable
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408 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable
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409 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable
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410 * @arg @ref I2C_IT_NACKI NACK received interrupt enable
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411 * @arg @ref I2C_IT_ADDRI Address match interrupt enable
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412 * @arg @ref I2C_IT_RXI RX interrupt enable
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413 * @arg @ref I2C_IT_TXI TX interrupt enable
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414 *
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415 * @retval None
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416 */
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417 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
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418
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419 /** @brief Disable the specified I2C interrupt.
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420 * @param __HANDLE__ specifies the I2C Handle.
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421 * @param __INTERRUPT__ specifies the interrupt source to disable.
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422 * This parameter can be one of the following values:
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423 * @arg @ref I2C_IT_ERRI Errors interrupt enable
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424 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable
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425 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable
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426 * @arg @ref I2C_IT_NACKI NACK received interrupt enable
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427 * @arg @ref I2C_IT_ADDRI Address match interrupt enable
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428 * @arg @ref I2C_IT_RXI RX interrupt enable
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429 * @arg @ref I2C_IT_TXI TX interrupt enable
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430 *
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431 * @retval None
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432 */
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433 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
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434
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435 /** @brief Check whether the specified I2C interrupt source is enabled or not.
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436 * @param __HANDLE__ specifies the I2C Handle.
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437 * @param __INTERRUPT__ specifies the I2C interrupt source to check.
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438 * This parameter can be one of the following values:
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439 * @arg @ref I2C_IT_ERRI Errors interrupt enable
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440 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable
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441 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable
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442 * @arg @ref I2C_IT_NACKI NACK received interrupt enable
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443 * @arg @ref I2C_IT_ADDRI Address match interrupt enable
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444 * @arg @ref I2C_IT_RXI RX interrupt enable
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445 * @arg @ref I2C_IT_TXI TX interrupt enable
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446 *
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447 * @retval The new state of __INTERRUPT__ (SET or RESET).
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448 */
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449 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
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450
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451 /** @brief Check whether the specified I2C flag is set or not.
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452 * @param __HANDLE__ specifies the I2C Handle.
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453 * @param __FLAG__ specifies the flag to check.
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454 * This parameter can be one of the following values:
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455 * @arg @ref I2C_FLAG_TXE Transmit data register empty
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456 * @arg @ref I2C_FLAG_TXIS Transmit interrupt status
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457 * @arg @ref I2C_FLAG_RXNE Receive data register not empty
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458 * @arg @ref I2C_FLAG_ADDR Address matched (slave mode)
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459 * @arg @ref I2C_FLAG_AF Acknowledge failure received flag
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460 * @arg @ref I2C_FLAG_STOPF STOP detection flag
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461 * @arg @ref I2C_FLAG_TC Transfer complete (master mode)
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462 * @arg @ref I2C_FLAG_TCR Transfer complete reload
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463 * @arg @ref I2C_FLAG_BERR Bus error
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464 * @arg @ref I2C_FLAG_ARLO Arbitration lost
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465 * @arg @ref I2C_FLAG_OVR Overrun/Underrun
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466 * @arg @ref I2C_FLAG_PECERR PEC error in reception
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467 * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
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468 * @arg @ref I2C_FLAG_ALERT SMBus alert
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469 * @arg @ref I2C_FLAG_BUSY Bus busy
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470 * @arg @ref I2C_FLAG_DIR Transfer direction (slave mode)
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471 *
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472 * @retval The new state of __FLAG__ (SET or RESET).
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473 */
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474 #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
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475
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476 /** @brief Clear the I2C pending flags which are cleared by writing 1 in a specific bit.
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477 * @param __HANDLE__ specifies the I2C Handle.
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478 * @param __FLAG__ specifies the flag to clear.
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479 * This parameter can be any combination of the following values:
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480 * @arg @ref I2C_FLAG_TXE Transmit data register empty
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481 * @arg @ref I2C_FLAG_ADDR Address matched (slave mode)
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482 * @arg @ref I2C_FLAG_AF Acknowledge failure received flag
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483 * @arg @ref I2C_FLAG_STOPF STOP detection flag
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484 * @arg @ref I2C_FLAG_BERR Bus error
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485 * @arg @ref I2C_FLAG_ARLO Arbitration lost
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486 * @arg @ref I2C_FLAG_OVR Overrun/Underrun
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487 * @arg @ref I2C_FLAG_PECERR PEC error in reception
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488 * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
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489 * @arg @ref I2C_FLAG_ALERT SMBus alert
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490 *
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491 * @retval None
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492 */
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493 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \
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494 : ((__HANDLE__)->Instance->ICR = (__FLAG__)))
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495
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496 /** @brief Enable the specified I2C peripheral.
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497 * @param __HANDLE__ specifies the I2C Handle.
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498 * @retval None
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499 */
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500 #define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
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501
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502 /** @brief Disable the specified I2C peripheral.
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503 * @param __HANDLE__ specifies the I2C Handle.
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504 * @retval None
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505 */
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506 #define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
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507
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508 /** @brief Generate a Non-Acknowledge I2C peripheral in Slave mode.
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509 * @param __HANDLE__: specifies the I2C Handle.
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510 * @retval None
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511 */
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512 #define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))
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513 /**
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514 * @}
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515 */
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516
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517 /* Include I2C HAL Extended module */
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518 #include "stm32l4xx_hal_i2c_ex.h"
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519
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520 /* Exported functions --------------------------------------------------------*/
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521 /** @addtogroup I2C_Exported_Functions
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522 * @{
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523 */
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524
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525 /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
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526 * @{
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527 */
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528 /* Initialization and de-initialization functions******************************/
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529 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
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530 HAL_StatusTypeDef HAL_I2C_DeInit (I2C_HandleTypeDef *hi2c);
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531 void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
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532 void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
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533 /**
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534 * @}
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535 */
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536
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537 /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions
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538 * @{
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539 */
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540 /* IO operation functions ****************************************************/
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541 /******* Blocking mode: Polling */
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542 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
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543 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
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544 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
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545 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
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546 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
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547 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
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548 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
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549
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550 /******* Non-Blocking mode: Interrupt */
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551 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
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552 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
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553 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
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554 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
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555 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
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556 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
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557
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558 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
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559 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
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560 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
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561 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
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562 HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
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563 HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
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564 HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
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565
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566 /******* Non-Blocking mode: DMA */
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567 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
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568 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
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569 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
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570 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
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571 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
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572 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
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573 /**
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574 * @}
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575 */
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576
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577 /** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
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578 * @{
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579 */
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580 /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
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581 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
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582 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
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583 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
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584 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
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585 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
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586 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
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587 void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
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588 void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
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589 void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
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590 void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
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591 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
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592 void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
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593 /**
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594 * @}
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595 */
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596
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597 /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
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598 * @{
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599 */
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600 /* Peripheral State, Mode and Error functions *********************************/
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601 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
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602 HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);
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603 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
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604
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605 /**
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606 * @}
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607 */
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608
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609 /**
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610 * @}
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611 */
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612
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613 /* Private constants ---------------------------------------------------------*/
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614 /** @defgroup I2C_Private_Constants I2C Private Constants
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615 * @{
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616 */
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617
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618 /**
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619 * @}
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620 */
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621
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622 /* Private macros ------------------------------------------------------------*/
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623 /** @defgroup I2C_Private_Macro I2C Private Macros
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624 * @{
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625 */
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626
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627 #define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \
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628 ((MODE) == I2C_ADDRESSINGMODE_10BIT))
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629
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630 #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
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631 ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
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632
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633 #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \
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634 ((MASK) == I2C_OA2_MASK01) || \
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635 ((MASK) == I2C_OA2_MASK02) || \
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636 ((MASK) == I2C_OA2_MASK03) || \
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637 ((MASK) == I2C_OA2_MASK04) || \
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638 ((MASK) == I2C_OA2_MASK05) || \
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639 ((MASK) == I2C_OA2_MASK06) || \
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640 ((MASK) == I2C_OA2_MASK07))
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641
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642 #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
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643 ((CALL) == I2C_GENERALCALL_ENABLE))
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644
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645 #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
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646 ((STRETCH) == I2C_NOSTRETCH_ENABLE))
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647
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648 #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
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649 ((SIZE) == I2C_MEMADD_SIZE_16BIT))
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650
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651 #define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \
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652 ((MODE) == I2C_AUTOEND_MODE) || \
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653 ((MODE) == I2C_SOFTEND_MODE))
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654
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655 #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \
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656 ((REQUEST) == I2C_GENERATE_START_READ) || \
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657 ((REQUEST) == I2C_GENERATE_START_WRITE) || \
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658 ((REQUEST) == I2C_NO_STARTSTOP))
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659
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660 #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \
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661 ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \
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662 ((REQUEST) == I2C_NEXT_FRAME) || \
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663 ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
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664 ((REQUEST) == I2C_LAST_FRAME))
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665
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666 #define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN)))
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667
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668 #define I2C_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16U)
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669 #define I2C_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U)
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670 #define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
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671 #define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1)
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672 #define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2)
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673
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674 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU)
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675 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)
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676
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677 #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U)))
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678 #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
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679
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680 #define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \
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681 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))
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682 /**
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683 * @}
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684 */
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685
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686 /* Private Functions ---------------------------------------------------------*/
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687 /** @defgroup I2C_Private_Functions I2C Private Functions
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688 * @{
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689 */
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690 /* Private functions are defined in stm32l4xx_hal_i2c.c file */
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691 /**
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692 * @}
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693 */
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694
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695 /**
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696 * @}
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697 */
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698
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699 /**
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700 * @}
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701 */
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702
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703 #ifdef __cplusplus
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704 }
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705 #endif
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706
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707
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708 #endif /* __STM32L4xx_HAL_I2C_H */
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709
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710 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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