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view l476rg/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h @ 6:ca42336826bd default tip
working on clock sources
| author | cin |
|---|---|
| date | Mon, 23 Jan 2017 02:40:17 +0300 |
| parents | 32a3b1785697 |
| children |
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/** ****************************************************************************** * @file stm32l4xx_hal_gpio_ex.h * @author MCD Application Team * @version V1.6.0 * @date 28-October-2016 * @brief Header file of GPIO HAL Extended module. ****************************************************************************** * @attention * * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> * * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: * 1. Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * 3. Neither the name of STMicroelectronics nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * ****************************************************************************** */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32L4xx_HAL_GPIO_EX_H #define __STM32L4xx_HAL_GPIO_EX_H #ifdef __cplusplus extern "C" { #endif /* Includes ------------------------------------------------------------------*/ #include "stm32l4xx_hal_def.h" /** @addtogroup STM32L4xx_HAL_Driver * @{ */ /** @defgroup GPIOEx GPIOEx * @brief GPIO Extended HAL module driver * @{ */ /* Exported types ------------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/ /** @defgroup GPIOEx_Exported_Constants GPIOEx Exported Constants * @{ */ /** @defgroup GPIOEx_Alternate_function_selection GPIOEx Alternate function selection * @{ */ #if defined(STM32L431xx) || defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) /*--------------STM32L431xx/STM32L432xx/STM32L433xx/STM32L442xx/STM32L443xx---*/ /** * @brief AF 0 selection */ #define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */ #define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */ #define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */ #if defined(STM32L433xx) || defined(STM32L443xx) #define GPIO_AF0_LCDBIAS ((uint8_t)0x00) /* LCDBIAS Alternate Function mapping */ #endif /* STM32L433xx || STM32L443xx */ #define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */ /** * @brief AF 1 selection */ #define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */ #define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */ #define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */ #define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */ /** * @brief AF 2 selection */ #define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */ #define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */ /** * @brief AF 3 selection */ #define GPIO_AF3_USART2 ((uint8_t)0x03) /* USART1 Alternate Function mapping */ #define GPIO_AF3_TIM1_COMP2 ((uint8_t)0x03) /* TIM1/COMP2 Break in Alternate Function mapping */ #define GPIO_AF3_TIM1_COMP1 ((uint8_t)0x03) /* TIM1/COMP1 Break in Alternate Function mapping */ /** * @brief AF 4 selection */ #define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */ #define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */ #define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */ /** * @brief AF 5 selection */ #define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */ #define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */ /** * @brief AF 6 selection */ #define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */ #define GPIO_AF6_COMP1 ((uint8_t)0x06) /* COMP1 Alternate Function mapping */ /** * @brief AF 7 selection */ #define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */ #define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */ #define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */ /** * @brief AF 8 selection */ #define GPIO_AF8_LPUART1 ((uint8_t)0x08) /* LPUART1 Alternate Function mapping */ /** * @brief AF 9 selection */ #define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */ #define GPIO_AF9_TSC ((uint8_t)0x09) /* TSC Alternate Function mapping */ /** * @brief AF 10 selection */ #if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) #define GPIO_AF10_USB_FS ((uint8_t)0x0A) /* USB_FS Alternate Function mapping */ #endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx */ #define GPIO_AF10_QUADSPI ((uint8_t)0x0A) /* QUADSPI Alternate Function mapping */ #if defined(STM32L433xx) || defined(STM32L443xx) /** * @brief AF 11 selection */ #define GPIO_AF11_LCD ((uint8_t)0x0B) /* LCD Alternate Function mapping */ #endif /* STM32L433xx || STM32L443xx */ /** * @brief AF 12 selection */ #define GPIO_AF12_SWPMI1 ((uint8_t)0x0C) /* SWPMI1 Alternate Function mapping */ #define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */ #define GPIO_AF12_COMP2 ((uint8_t)0x0C) /* COMP2 Alternate Function mapping */ #define GPIO_AF12_SDMMC1 ((uint8_t)0x0C) /* SDMMC1 Alternate Function mapping */ /** * @brief AF 13 selection */ #define GPIO_AF13_SAI1 ((uint8_t)0x0D) /* SAI1 Alternate Function mapping */ /** * @brief AF 14 selection */ #define GPIO_AF14_TIM2 ((uint8_t)0x0E) /* TIM2 Alternate Function mapping */ #define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */ #define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */ #define GPIO_AF14_LPTIM2 ((uint8_t)0x0E) /* LPTIM2 Alternate Function mapping */ /** * @brief AF 15 selection */ #define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */ #define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F) #endif /* STM32L431xx || STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx */ #if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx) /*--------------STM32L451xx/STM32L452xx/STM32L462xx---------------------------*/ /** * @brief AF 0 selection */ #define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */ #define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */ #define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */ #define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */ /** * @brief AF 1 selection */ #define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */ #define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */ #define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */ #define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */ /** * @brief AF 2 selection */ #define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */ #define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */ #define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */ #define GPIO_AF2_I2C4 ((uint8_t)0x02) /* I2C4 Alternate Function mapping */ /** * @brief AF 3 selection */ #define GPIO_AF3_TIM1_COMP2 ((uint8_t)0x03) /* TIM1/COMP2 Break in Alternate Function mapping */ #define GPIO_AF3_TIM1_COMP1 ((uint8_t)0x03) /* TIM1/COMP1 Break in Alternate Function mapping */ #define GPIO_AF3_USART2 ((uint8_t)0x03) /* USART2 Alternate Function mapping */ #define GPIO_AF3_CAN1 ((uint8_t)0x03) /* CAN1 Alternate Function mapping */ #define GPIO_AF3_I2C4 ((uint8_t)0x03) /* I2C4 Alternate Function mapping */ /** * @brief AF 4 selection */ #define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */ #define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */ #define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */ #define GPIO_AF4_I2C4 ((uint8_t)0x04) /* I2C4 Alternate Function mapping */ /** * @brief AF 5 selection */ #define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */ #define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */ #define GPIO_AF5_I2C4 ((uint8_t)0x05) /* I2C4 Alternate Function mapping */ /** * @brief AF 6 selection */ #define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */ #define GPIO_AF6_DFSDM1 ((uint8_t)0x06) /* DFSDM1 Alternate Function mapping */ #define GPIO_AF6_COMP1 ((uint8_t)0x06) /* COMP1 Alternate Function mapping */ /** * @brief AF 7 selection */ #define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */ #define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */ #define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */ /** * @brief AF 8 selection */ #define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */ #define GPIO_AF8_LPUART1 ((uint8_t)0x08) /* LPUART1 Alternate Function mapping */ #define GPIO_AF8_CAN1 ((uint8_t)0x08) /* CAN1 Alternate Function mapping */ /** * @brief AF 9 selection */ #define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */ #define GPIO_AF9_TSC ((uint8_t)0x09) /* TSC Alternate Function mapping */ /** * @brief AF 10 selection */ #if defined(STM32L452xx) || defined(STM32L462xx) #define GPIO_AF10_USB_FS ((uint8_t)0x0A) /* USB_FS Alternate Function mapping */ #endif /* STM32L452xx || STM32L462xx */ #define GPIO_AF10_QUADSPI ((uint8_t)0x0A) /* QUADSPI Alternate Function mapping */ #define GPIO_AF10_CAN1 ((uint8_t)0x0A) /* CAN1 Alternate Function mapping */ /** * @brief AF 11 selection */ /** * @brief AF 12 selection */ #define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */ #define GPIO_AF12_COMP2 ((uint8_t)0x0C) /* COMP2 Alternate Function mapping */ #define GPIO_AF12_SDMMC1 ((uint8_t)0x0C) /* SDMMC1 Alternate Function mapping */ /** * @brief AF 13 selection */ #define GPIO_AF13_SAI1 ((uint8_t)0x0D) /* SAI1 Alternate Function mapping */ /** * @brief AF 14 selection */ #define GPIO_AF14_TIM2 ((uint8_t)0x0E) /* TIM2 Alternate Function mapping */ #define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */ #define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */ #define GPIO_AF14_TIM17 ((uint8_t)0x0E) /* TIM17 Alternate Function mapping */ #define GPIO_AF14_LPTIM2 ((uint8_t)0x0E) /* LPTIM2 Alternate Function mapping */ /** * @brief AF 15 selection */ #define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */ #define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F) #endif /* STM32L451xx || STM32L452xx || STM32L462xx */ #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) /*--------------STM32L471xx/STM32L475xx/STM32L476xx/STM32L485xx/STM32L486xx---*/ /** * @brief AF 0 selection */ #define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */ #define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */ #define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */ #if defined(STM32L476xx) || defined(STM32L486xx) #define GPIO_AF0_LCDBIAS ((uint8_t)0x00) /* LCDBIAS Alternate Function mapping */ #endif /* STM32L476xx || STM32L486xx */ #define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */ /** * @brief AF 1 selection */ #define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */ #define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */ #define GPIO_AF1_TIM5 ((uint8_t)0x01) /* TIM5 Alternate Function mapping */ #define GPIO_AF1_TIM8 ((uint8_t)0x01) /* TIM8 Alternate Function mapping */ #define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */ #define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */ /** * @brief AF 2 selection */ #define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */ #define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */ #define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */ #define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */ #define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */ /** * @brief AF 3 selection */ #define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */ #define GPIO_AF3_TIM1_COMP2 ((uint8_t)0x03) /* TIM1/COMP2 Break in Alternate Function mapping */ #define GPIO_AF3_TIM1_COMP1 ((uint8_t)0x03) /* TIM1/COMP1 Break in Alternate Function mapping */ /** * @brief AF 4 selection */ #define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */ #define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */ #define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */ /** * @brief AF 5 selection */ #define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */ #define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */ /** * @brief AF 6 selection */ #define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */ #define GPIO_AF6_DFSDM1 ((uint8_t)0x06) /* DFSDM1 Alternate Function mapping */ /** * @brief AF 7 selection */ #define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */ #define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */ #define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */ /** * @brief AF 8 selection */ #define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */ #define GPIO_AF8_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */ #define GPIO_AF8_LPUART1 ((uint8_t)0x08) /* LPUART1 Alternate Function mapping */ /** * @brief AF 9 selection */ #define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */ #define GPIO_AF9_TSC ((uint8_t)0x09) /* TSC Alternate Function mapping */ /** * @brief AF 10 selection */ #if defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) #define GPIO_AF10_OTG_FS ((uint8_t)0x0A) /* OTG_FS Alternate Function mapping */ #endif /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ #define GPIO_AF10_QUADSPI ((uint8_t)0x0A) /* QUADSPI Alternate Function mapping */ #if defined(STM32L476xx) || defined(STM32L486xx) /** * @brief AF 11 selection */ #define GPIO_AF11_LCD ((uint8_t)0x0B) /* LCD Alternate Function mapping */ #endif /* STM32L476xx || STM32L486xx */ /** * @brief AF 12 selection */ #define GPIO_AF12_FMC ((uint8_t)0x0C) /* FMC Alternate Function mapping */ #define GPIO_AF12_SWPMI1 ((uint8_t)0x0C) /* SWPMI1 Alternate Function mapping */ #define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */ #define GPIO_AF12_COMP2 ((uint8_t)0x0C) /* COMP2 Alternate Function mapping */ #define GPIO_AF12_SDMMC1 ((uint8_t)0x0C) /* SDMMC1 Alternate Function mapping */ /** * @brief AF 13 selection */ #define GPIO_AF13_SAI1 ((uint8_t)0x0D) /* SAI1 Alternate Function mapping */ #define GPIO_AF13_SAI2 ((uint8_t)0x0D) /* SAI2 Alternate Function mapping */ #define GPIO_AF13_TIM8_COMP2 ((uint8_t)0x0D) /* TIM8/COMP2 Break in Alternate Function mapping */ #define GPIO_AF13_TIM8_COMP1 ((uint8_t)0x0D) /* TIM8/COMP1 Break in Alternate Function mapping */ /** * @brief AF 14 selection */ #define GPIO_AF14_TIM2 ((uint8_t)0x0E) /* TIM2 Alternate Function mapping */ #define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */ #define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */ #define GPIO_AF14_TIM17 ((uint8_t)0x0E) /* TIM17 Alternate Function mapping */ #define GPIO_AF14_LPTIM2 ((uint8_t)0x0E) /* LPTIM2 Alternate Function mapping */ #define GPIO_AF14_TIM8_COMP1 ((uint8_t)0x0E) /* TIM8/COMP1 Break in Alternate Function mapping */ /** * @brief AF 15 selection */ #define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */ #define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F) #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ /** * @} */ /** * @} */ /* Exported macro ------------------------------------------------------------*/ /** @defgroup GPIOEx_Exported_Macros GPIOEx Exported Macros * @{ */ /** @defgroup GPIOEx_Get_Port_Index GPIOEx_Get Port Index * @{ */ #if defined(STM32L431xx) || defined(STM32L433xx) || defined(STM32L443xx) #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\ ((__GPIOx__) == (GPIOB))? 1U :\ ((__GPIOx__) == (GPIOC))? 2U :\ ((__GPIOx__) == (GPIOD))? 3U :\ ((__GPIOx__) == (GPIOE))? 4U : 7U) #endif /* STM32L431xx || STM32L433xx || STM32L443xx */ #if defined(STM32L432xx) || defined(STM32L442xx) #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\ ((__GPIOx__) == (GPIOB))? 1U :\ ((__GPIOx__) == (GPIOC))? 2U : 7U) #endif /* STM32L432xx || STM32L442xx */ #if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx) #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\ ((__GPIOx__) == (GPIOB))? 1U :\ ((__GPIOx__) == (GPIOC))? 2U :\ ((__GPIOx__) == (GPIOD))? 3U :\ ((__GPIOx__) == (GPIOE))? 4U : 7U) #endif /* STM32L451xx || STM32L452xx || STM32L462xx */ #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\ ((__GPIOx__) == (GPIOB))? 1U :\ ((__GPIOx__) == (GPIOC))? 2U :\ ((__GPIOx__) == (GPIOD))? 3U :\ ((__GPIOx__) == (GPIOE))? 4U :\ ((__GPIOx__) == (GPIOF))? 5U :\ ((__GPIOx__) == (GPIOG))? 6U : 7U) #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ /** * @} */ /** * @} */ /* Exported functions --------------------------------------------------------*/ /** * @} */ /** * @} */ #ifdef __cplusplus } #endif #endif /* __STM32L4xx_HAL_GPIO_EX_H */ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/